SP508CF-L Exar Corporation, SP508CF-L Datasheet - Page 23

IC TXRX MULTIPROTOCOL 100LQFP

SP508CF-L

Manufacturer Part Number
SP508CF-L
Description
IC TXRX MULTIPROTOCOL 100LQFP
Manufacturer
Exar Corporation
Type
Transceiverr
Datasheet

Specifications of SP508CF-L

Package / Case
100-LQFP
Number Of Drivers/receivers
8/8
Protocol
Multiprotocol
Voltage - Supply
5V
Mounting Type
Surface Mount
Input Voltage Range (max)
7 V
Maximum Operating Temperature
+ 70 C
Maximum Power Dissipation
1.52 W
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Number Of Drivers
8
Operating Supply Voltage
5 V
Propagation Delay Time
1 us
Supply Current (max)
100 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
1016-1192

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SP508CF-L
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The charge pump cycle will continue as long
as the operational conditions for the internal
oscillator are present.
Since both V
ated from V
V
approaches that generate V
a decrease in the magnitude of V
to V
the design.
The clock rate for the charge pump typically
operates at 250kHz. The external capacitors
can be as low as µF with a 6V breakdown
voltage rating.
TERM_OFF FUNCTION
The SP508 contains a TERM_OFF pin
that disables all three receiver input ter-
mination networks regardless of mode.
This allows the device to be used in
monitor mode applications that are typi-
cally found in networking test equipment.
The TERM_OFF pin internally contains a
pull-down device with an impedance of over
500kΩ, which will default in a “ON” condition
during power-up if V.35 receivers are used.
The individual receiver enable line and
the SHUTDOWN mode from the decoder
will disable the termination regardless of
TERM_OFF.
LOOPBACk FUNCTION
The SP508 contains a LOOPBACK pin that
invokes a loopback path. This loopback path
is illustrated in Figure 46. LOOPBACK has
an internal pull-up resistor that defaults to
normal mode during power up or if the pin is
left floating. During loopback, the driver out-
put and receiver input characteristics will still
adhere to its appropriate specifications.
DECODER AND D_LATCh FUNCTION
The SP508 contains a D_LATCH pin
that latches the data into the D0, D,
and D2 decoder inputs. If tied to a
logic LOW (“0”), the latch is transpar-
ent, allowing the data at the decoder in-
puts to propagate through and program
the SP508 accordingly. If tied to a logic
HIGH(“”), the latch locks out the data and
prevents the mode from changing until this
pin is brought to a logic LOW.
-
will be symmetrical. Older charge pump
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com SP508_00_02709
+
due to the inherent inefficiencies in
CC
+
; in a no-load condition V
and V
-
are separately gener-
-
from V
-
compared
+
will show
+
and
23
There are internal pull-up devices on D0,
D, and D2, which allow the device to be in
SHUTDOWN mode (“”) upon power up.
However , if the device is powered -up with
the D_LATCH at a logic HIGH, the decoder
state of the SP508 will be undefined.
ESD TOLERANCE
The SP508 device incorporates ruggedized
ESD cells on all driver output and receiver
input pins. The ESD structure is improved
over our previous family for more rugged
applications and environments sensitive
to electrostatic discharges and associated
transients.
CTR1/CTR2 EUROPEAN COMPLIANCY
As with all of Exar’s previous multi-
protocol serial transceiver IC’s, the
drivers and receivers have been de-
signed to meet all the requirements to
NET/NET2 and TBR2 in order to meet
CTR/CTR2 compliancy. The SP508 is
also tested in-house at Exar and adheres
to all the NET/2 physical layer testing
and the ITU Series V specifications before
shipment. Please note that although the
SP508 , as with its predecessors, ad-
here to CTR/CTR2 compliancy testing,
any complex or unusual configuration should
be double-checked to ensure CTR/CTR2
compliance. Consult the factory for de-
tails.

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