MCF5282CVM66 Freescale Semiconductor, MCF5282CVM66 Datasheet - Page 519

• Manufacturer Part Number: MCF5282CVM66
• Description: IC MPU 512K 66MHZ 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF528xr

Specifications of MCF5282CVM66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 150
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Controller Family/series: ColdFire
• No. Of I/o's: 150
• Ram Memory Size: 64KB
• Cpu Speed: 66.67MHz
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of Pwm Channels: 8
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

26.3.2.7 Port F Pin Assignment Register (PFPAR)
The PFPAR controls the pin function of port F[7:5].
Freescale Semiconductor
1
Address
Reset state determined during reset configuration. PFPAn = 1 in master mode and 0 in all other modes.
Reset
R/W:
Field
Bits
4–0
7
6
5
PFPA7
7
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
See Note 1
Figure 26-21. Port F Pin Assignment Register (PFPAR)
PFPA7
PFPA6
PFPA5
Name
PFPA6
R/W
—
6
Table 26-11. PFPAR Field Descriptions
1
PFPA5
Port F pin assignment 1. The PFPA7 bit configures the port F7 pin for its
primary function (A23), alternate function (CS6), or digital I/O.
1 Port F7 pin configured for primary function (A23) or alternate function
0 Port F7 pin configured for digital I/O
Refer to
information on reset configuration.
Port F pin assignment 6. The PFPA6 bit configures the port F6 pin for its
primary function (A22), alternate function (CS5), or digital I/O.
1 Port F6 pin configured for primary function (A22) or alternate function
0 Port F6 pin configured for digital I/O
Refer to
information on reset configuration.
Port F pin assignment 5. The PFPAR bit configures the port F5 pin for its
primary function (A21), alternate function (CS4), or digital I/O.
1 Port F5 pin configured for primary function (A21) or alternate function
0 Port F5 pin configured for digital I/O
Refer to
information on reset configuration.
Reserved, should be cleared.
5
(CS6), depending on the chip configuration.
(CS5), depending on the chip configuration.
(CS4), depending on the chip configuration.
Chapter 27, “Chip Configuration Module
Chapter 27, “Chip Configuration Module
Chapter 27, “Chip Configuration Module
IPSBAR + 0x10_0051
4
Description
0_0000
—
R
(CCM)” for more
(CCM)” for more
(CCM)” for more
General Purpose I/O Module
0
26-19