MCF5274CVM166 Freescale Semiconductor, MCF5274CVM166 Datasheet - Page 36

• Manufacturer Part Number: MCF5274CVM166
• Description: IC MPU 32BIT 166MHZ 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5274CVM166

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 166MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Embedded Interface Type: I2C, SPI, USB, UART
• Digital Ic Case Style: BGA
• No. Of Pins: 256
• Operating Temperature Range: -40°C To +85°C
• Processor Type: 68K/ColdFire V2
• Rohs Compliant: Yes
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 166MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 1.6V
• Operating Supply Voltage (min): 1.4V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 256
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

Electrical Characteristics
8.11.4
Table 21
MDC frequency of 2.5 MHz.
Figure 19
36
Num
M10 FECn_MDC falling edge to FECn_MDIO output invalid (minimum
M11 FECn_MDC falling edge to FECn_MDIO output valid (max prop delay)
M12 FECn_MDIO (input) to FECn_MDC rising edge setup
M13 FECn_MDIO (input) to FECn_MDC rising edge hold
M14 FECn_MDC pulse width high
M15 FECn_MDC pulse width low
lists MII serial management channel timings. The FEC functions correctly with a maximum
shows MII serial management channel timings listed in
FECn_MDC (output)
FECn_MDIO (output)
MII Serial Management Channel Timing (FECn_MDIO and
FECn_MDC)
propagation delay)
FECn_MDIO (input)
MCF5275 Integrated Microprocessor Family Hardware Specification, Rev. 4
Figure 19. MII Serial Management Channel Timing Diagram
Table 21. MII Serial Management Channel Timing
Characteristic
M12
M13
M14
M10
M11
M15
Table
21.
40%
40%
Min
10
—
0
0
Max
60%
60%
—
25
—
—
Freescale Semiconductor
MDC period
MDC period
Unit
ns
ns
ns
ns