MC68711E20CFNE3 Freescale Semiconductor, MC68711E20CFNE3 Datasheet - Page 109

IC MCU 8BIT 52-PLCC

MC68711E20CFNE3

Manufacturer Part Number
MC68711E20CFNE3
Description
IC MCU 8BIT 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet

Specifications of MC68711E20CFNE3

Core Processor
HC11
Core Size
8-Bit
Speed
3MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
20KB (20K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Processor Series
M687xx
Core
HC11
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI, SPI
Maximum Clock Frequency
3 MHz
Number Of Programmable I/os
38
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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9.6 Control Timing
Freescale Semiconductor
Frequency of operation
E-clock period
Crystal frequency
External oscillator frequency
Processor control setup timet
Reset input pulse width
To guarantee external reset vector
Mode programming setup time
Mode programming hold time
Interrupt pulse width, PW
Wait recovery startup time
Timer pulse width PW
1. V
2. Reset is recognized during the first clock cycle it is held low. Internal circuitry then drives the pin low for four clock cycles,
Minimum input time can be preempted by internal reset
IRQ edge-sensitive mode
Input capture pulse
Accumulator input
otherwise noted.
releases the pin, and samples the pin level two cycles later to determine the source of the interrupt. Refer to
Input/Output (I/O) Ports
DD
= 5.0 Vdc ± 10%, V
Notes:
PA0–PA3
PA0–PA3
3. Maximum pulse accumulator clocking rate is E-clock frequency divided by 2.
1. Rising edge sensitive input
2. Falling edge sensitive input
PA7
PA7
(1) (3)
(2) (3)
(1)
(2)
TIM
Characteristic
(2)
IRQ
= t
SS
for further details.
cyc
= t
PCSU
= 0 Vdc, T
cyc
+ 20 ns
= 1/4 t
+ 20 ns
PW
(1)
TIM
A
cyc
= T
MC68HC711D3 Data Sheet, Rev. 2.1
+ 50 ns
L
Figure 9-3. Timer Inputs
to T
H
. All timing is shown with respect to 20% V
Symbol
PW
PW
PW
t
f
t
t
t
PCSU
4 f
XTAL
WRS
t
MPS
MPH
cyc
f
RSTL
O
IRQ
TIM
O
1000
1020
1020
Min
300
dc
dc
10
1.0 MHz
8
1
2
Max
1.0
4.0
4.0
4
Min
500
175
520
520
dc
dc
10
2.0 MHz
8
1
2
DD
and 70% V
Max
2.0
8.0
8.0
4
Min
333
133
353
353
dc
dc
10
3.0 MHz
8
1
2
Control Timing
DD
Chapter 5
, unless
Max
12.0
12.0
3.0
4
MHz
MHz
MHz
Unit
t
t
t
ns
ns
ns
ns
ns
cyc
cyc
cyc
109

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