XC705B32CFNE Freescale Semiconductor, XC705B32CFNE Datasheet - Page 56

• Manufacturer Part Number: XC705B32CFNE
• Description: IC MCU 2.1MHZ 32K OTP 52-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of XC705B32CFNE

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SCI
• Peripherals: POR, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Eeprom Size: 256 x 8
• Ram Size: 528 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4
a digital read of port D with levels other than V
power dissipation during the read cycle.
As port D is an input-only port there is no DDR associated with it. Also, at power up or external
reset, the A/D converter is disabled, thus the port is configured as a standard input-only port.
Note:
4.5
The following sections explain in detail the individual bits in the data and control registers
associated with the ports.
4.5.1
Each bit can be configured as input or output via the corresponding data direction bit in the port
data direction register (DDRx).
The state of the port data registers following reset is not defined.
4.5.2
Each bit can be configured as input or output via the corresponding data direction bit in the port
data direction register (DDRx).
In addition, bit 2 of port C is used to output the CPU clock if the ECLK bit in the EEPROM
CTL/ECLK register is set (see
The state of the port data registers following reset is not defined.
Freescale
4-4
Port C data (PORTC)
Port A data (PORTA)
Port B data (PORTB)
It is recommended that all unused input ports and I/O ports be tied to an appropriate
logic level (i.e. either V
Port registers
Port data registers A and B (PORTA and PORTB)
Port data register C (PORTC)
Address
Address
$0000
$0001
$0002
Section
DD
INPUT/OUTPUT PORTS
or V
bit 7
bit 7
4.3).
SS
).
bit 6
bit 6
DD
or V
bit 5
bit 5
SS
bit 4
bit 4
on the port D pins will result in greater
bit 3
bit 3
ECLK
PC2/
bit 2
bit 2
bit 1
bit 1
MC68HC05B6
bit 0
bit 0
Undefined
Undefined
Undefined
Rev. 4.1
on reset
on reset
State
State