M30280F6HP#D3 Renesas Electronics America, M30280F6HP#D3 Datasheet - Page 318

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M30280F6HP#D3

Manufacturer Part Number
M30280F6HP#D3
Description
MCU 3/5V 48K I-TEMP 80-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Datasheet

Specifications of M30280F6HP#D3

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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M
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18. Flash Memory Version
18.1 Flash Memory Performance
1
e
E
NOTES:
Table 18.1 Flash Memory Version Specifications
. v
6
Flash memory operating mode
Erase block
Program method
Erase method
Program, erase control method
Protect method
Number of commands
Program/Erase
Endurance
Data Retentio
ROM code protection
J
In the flash memory version, rewrite operation to the flash memory can be performed in three modes : CPU
rewrite mode, standard serial I/O mode and parallel I/O mode.
Table 18.1 lists specifications of the flash memory version. (Refer to Table 1.1 or Table 1.2 for the items
not listed in Table 18.1.
0
C
1. Program and erase endurance is defined as number of program-erase cycles per block. If program and erase
2. To reduce the number of program and erase endurance when working with systems requiring numerous rewrites,
2
9
2 /
0 .
B
endurance is n cycle (n=100, 1000, 10000), each block can be erased and programmed n cycles. For example, if a
2-Kbyte block A is erased after programming one-word data to each address 1,024 times, this counts as one
program and erase endurance. Data cannot be programmed to the same address more than once without erasing
the block. (rewrite prohibited).
write to unused word addresses within the block instead of rewrite. Erase block only after all possible addresses are
used. For example, an 8-word program can be written 128 times maximum before erase becomes necessary.
Maintaining an equal number of times erasure between block A and block B will also improve efficiency. It is
recommended to track the total number of erasure performed per block and to limit the number of erasure.
8
0
0
0
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7
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(1)
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3
0
, 1
0
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2
0
1
0
6
Block 0 to 5 (program space)
Block A and B (data space)
7
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Item
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page 296
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8
5
(2)
3 modes (CPU rewrite, standard serial I/O, parallel I/O)
In units of word
Block erase
Program and erase controlled by software command
Block 0 to block 5 are write protected by FMR16 bit.
In addition, the block 0 and block 1 are write protected by bit FMR02
5 commands
100 times, 1,000 times (See Tables 1.5 and 1.6 Product Code)
100 times, 10,000 times (See Tables 1.5 and 1.6 Product Code)
20 years (Topr = 55 C)
Parallel I/O and standard serial I/O modes are supported
See Figures 18.1 to18.4 Flash Memory Block Diagram
Specification
18. Flash Memory Version

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