M30280F6HP#D3 Renesas Electronics America, M30280F6HP#D3 Datasheet - Page 295

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M30280F6HP#D3

Manufacturer Part Number
M30280F6HP#D3
Description
MCU 3/5V 48K I-TEMP 80-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Datasheet

Specifications of M30280F6HP#D3

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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R
R
M
16.9 START Condition Generation Method
e
E
1
. v
J
6
Figure 16.14 Start condition generation flow chart
0
Set the MST bit, TRX bit and BB flags in the S10 register to "1" and set the PIN bit and 4 low-order bits in the
S10 register to "0" simultaneously, to enter START condition standby mode, when the ES0 bit in the S1D0
register is set to “1” (I
address is written to the S00 register next, START condition is generated and the bit counter is reset to
"000
clock mode and high-speed clock mode. See Figure 16.16 and Table 16.8.
C
2
9
0 .
2 /
B
0
0
8
0
2
4
G
" and 1-byte SCL signal is output. The START condition generation timing varies between standard
J
7
a
o r
0 -
. n
u
2
3
p
0
, 1
0
(
M
2
0
1
0
6
7
C
Interrupt disable
Interrupt enable
2 /
page 273
S00=Data
S10=E0
, 8
2
BB=0?
C bus interface enabled) and the BB flag is set to “0” (bus free). When the slave
M
Yes
1
6
16
C
f o
2 /
8
3
) B
8
5
No
Start condition standby status setting
Start condition trigger generation
*Data=Slave address data
16. MULTI-MASTER I
2
C bus INTERFACE

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