MC908GR32AMFAE Freescale Semiconductor, MC908GR32AMFAE Datasheet - Page 179

• Manufacturer Part Number: MC908GR32AMFAE
• Description: IC MCU 8BIT 32K FLASH 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR32AMFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

13.9.1 ESCI Arbiter Control Register
AM1 and AM0 — Arbiter Mode Select Bits
ALOST — Arbitration Lost Flag
ACLK — Arbiter Counter Clock Select Bit
AFIN— Arbiter Bit Time Measurement Finish Flag
ARUN— Arbiter Counter Running Flag
Freescale Semiconductor
These read/write bits select the mode of the arbiter module as shown in
Table
This read-only bit indicates loss of arbitration. Clear ALOST by writing a 0 to AM1. Reset clears
ALOST.
This read/write bit selects the arbiter counter clock source. Reset clears ACLK.
This read-only bit indicates bit time measurement has finished. Clear AFIN by writing any value to
SCIACTL. Reset clears AFIN.
This read-only bit indicates the arbiter counter is running. Reset clears ARUN.
1 = Arbiter counter is clocked with one half of the ESCI input clock generated by the ESCI prescaler
0 = Arbiter counter is clocked with the bus clock divided by four
1 = Bit time measurement has finished
0 = Bit time measurement not yet finished
1 = Arbiter counter running
0 = Arbiter counter stopped
13-12. Reset clears AM1 and AM0.
Address:
For ACLK = 1, the arbiter input clock is driven from the ESCI prescaler. The
prescaler can be clocked by either the bus clock or CGMXCLK depending
on the state of the SCIBDSRC bit in CONFIG2.
Reset:
Read:
Write:
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
$000A
Figure 13-19. ESCI Arbiter Control Register (SCIACTL)
AM1
Bit 7
0
AM[1:0]
Table 13-12. ESCI Arbiter Selectable Modes
= Unimplemented
0 0
0 1
1 0
1 1
ALOST
6
0
AM0
5
0
Idle / counter reset
Bit time measurement
Bus arbitration
Reserved / do not use
NOTE
ACLK
4
0
ESCI Arbiter Mode
AFIN
3
0
ARUN
2
0
AROVFL
1
0
ARD8
Bit 0
0
ESCI Arbiter
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