MC908GR32AMFAE Freescale Semiconductor, MC908GR32AMFAE Datasheet - Page 117

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MC908GR32AMFAE

Manufacturer Part Number
MC908GR32AMFAE
Description
IC MCU 8BIT 32K FLASH 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908GR32AMFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Part Number:
MC908GR32AMFAE
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10 000
An interrupt signal on an edge-triggered pin can be acknowledged immediately after enabling the pin. An
interrupt signal on an edge- and level-triggered interrupt pin must be acknowledged after a delay that
depends on the external load.
Another way to avoid a false interrupt:
9.5 Low-Power Modes
The WAIT and STOP instructions put the microcontroller unit (MCU) in low power-consumption standby
modes.
9.5.1 Wait Mode
The keyboard module remains active in wait mode. Clearing the IMASKK bit in the keyboard status and
control register enables keyboard interrupt requests to bring the MCU out of wait mode.
9.5.2 Stop Mode
The keyboard module remains active in stop mode. Clearing the IMASKK bit in the keyboard status and
control register enables keyboard interrupt requests to bring the MCU out of stop mode.
9.6 Keyboard Module During Break Interrupts
The system integration module (SIM) controls whether the keyboard interrupt latch can be cleared during
the break state. The BCFE bit in the break flag control register (BFCR) enables software to clear status
bits during the break state.
To allow software to clear the keyboard interrupt latch during a break interrupt, write a 1 to the BCFE bit.
If a latch is cleared during the break state, it remains cleared when the MCU exits the break state.
To protect the latch during the break state, write a 0 to the BCFE bit. With BCFE at 0 (its default state),
writing to the keyboard acknowledge bit (ACKK) in the keyboard status and control register during the
break state has no effect. See
9.7 I/O Registers
These registers control and monitor operation of the keyboard module:
Freescale Semiconductor
1. Configure the keyboard pins as outputs by setting the appropriate DDRA bits in data direction
2. Write 1s (or 0s) to the appropriate port A data register bits.
3. Enable the KBI pins and polarity by setting the appropriate KBIEx bits in the keyboard interrupt
register A.
enable register and the KBIPx bits in the keyboard interrupt polarity register.
Keyboard status and control register (INTKBSCR)
Keyboard interrupt enable register (INTKBIER)
Keyboard interrupt polarity register (INTKBIPR)
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
9.7.1 Keyboard Status and Control
Register.
Low-Power Modes
117

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