M30280F6HP#U5 Renesas Electronics America, M30280F6HP#U5 Datasheet - Page 59
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M30280F6HP#U5
Manufacturer Part Number
M30280F6HP#U5
Description
IC M16C MCU FLASH 48K 80LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Specifications of M30280F6HP#U5
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R
R
M
e
E
1
. v
Figure 5.6 D4INT Register
Figure 5.7 Typical Operation of Brown-out Detection Reset (Hardware Reset 2)
J
6
0
C
2
9
0 .
2 /
B
0
0
8
0
4
G
J
VCC
RESET
Internal Reset Signal
VC13 bit in
VCR1 register
VC26 bit in
VCR2 register
VC27 bit in
VCR2 register
7
a
o r
NOTES :
0 -
. n
u
2
Low Voltage Detection Interrupt Register
3
b 7
p
0
1. VC26 bit is invalid in stop mode. (the microcomputer is not reset even if input voltage of VCC pin
NOTES:
, 1
0
(
becomes lower than Vdet3).
b 6
1. Write to this register after setting the PRC3 bit in the PRCR register to “1” (write enable).
2. Useful when the VC27 bit in the VCR2 register is set to “1” (low voltage detection circuit enabled). If the
3. This bit is set to “0” by writing a “0” in a program. (Writing a “1” has no effect.)
4. If the low voltage detection interrupt needs to be used to get out of stop mode again after once used for that
5. The D40 bit is effective when the VC27 bit in the VCR2 register is set to “1”. To set the D40 bit to “1”, follow
M
2
0
VC27 bit is set to “0” (low voltage detection circuit disable), the D42 bit is set to “0” (Not detect).
purpose, reset the D41 bit by writing a “0” and then a “1”.
the procedure described below.
1
b 5
0
6
(1)
7
(1) Set the VC27 bit to “1”.
(2) Wait for td(E-A) until the detection circuit is actuated.
(3) Wait for the sampling time (refer to Table 5.3 Sampling Clock Periods).
(4) Set the D40 bit to “1”.
C
b 4
2 /
b 3
, 8
page 37
b 2
Vdet3s
Vdet3r
M
Vdet3
Vdet4
VSS
1
b 1
6
Indeterminate
Indeterminate
Indeterminate
C
b 0
f o
2 /
8
3
B i t S y m b o l
D 4 0
D 4 1
D 4 2
D43
DF0
D F 1
(b7-b6)
) B
8
S y m b o l
D 4 I N T
5
5.0V
Low voltage detection
interrupt enable bit
STOP mode deactivation
control bit
Voltage change detection flag
(2)
WDT overflow detect flag
Sampling clock select bit
Nothing is assigned. When write, set to “0”. When read, its
content is “0”.
Bit Name
A d d r e s s
0 0 1 F
(4)
Set to “1” by program (reset level detect circuit enable)
(1)
Set to “1” by program
(low voltage detection circuit enable)
1 6
(5)
b 5b4
0 : D i s a b l e ( d o n o t u s e t h e l o w
1 : E n a b l e ( u s e t h e l o w v o l t a g e
0 :
1 :
0: Not detected
1: Vdet4 passing detection
0 : N o t d e t e c t e d
1 : D e t e c t e d
0 0 : C P U c l o c k d i v i d e d b y 8
0 1 : C P U c l o c k d i v i d e d b y 1 6
1 0 : C P U c l o c k d i v i d e d b y 3 2
1 1 : C P U c l o c k d i v i d e d b y 6 4
A f t e r R e s e t
0 0
v o l t a g e d e t e c t i o n i n t e r r u p t t o e x i t
s t o p m o d e )
d e t e c t i o n i n t e r r u p t t o e x i t s t o p
m o d e )
1 6
Disable
Enable
Function
( 3 )
( 3 )
RW
RW
RW
RW
RW
R W
R W
5.0V
5. Reset
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