HD64F3694FY Renesas Electronics America, HD64F3694FY Datasheet - Page 224
HD64F3694FY
Manufacturer Part Number
HD64F3694FY
Description
IC H8 MCU FLASH 32K 48-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet
1.HD64F3694GFYV.pdf
(452 pages)
Specifications of HD64F3694FY
Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI
Peripherals
PWM, WDT
Number Of I /o
29
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3694FYJV
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Company:
Part Number:
HD64F3694FYV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 14 Serial Communication Interface 3 (SCI3)
14.3.6
SCR3 is a register that enables or disables SCI3 transfer operations and interrupt requests, and is
also used to select the transfer clock source. For details on interrupt requests, refer to section 14.7,
Interrupts.
Rev.5.00 Nov. 02, 2005 Page 194 of 418
REJ09B0028-0500
Bit
1
0
Bit
7
6
5
4
Bit Name
CKS1
CKS0
Bit Name
TIE
RIE
TE
RE
Serial Control Register 3 (SCR3)
Initial
Value
0
0
Initial
Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Clock Select 0 and 1
These bits select the clock source for the on-chip baud
rate generator.
00:
01: /4 clock (n = 1)
10: /16 clock (n = 2)
11: /64 clock (n = 3)
For the relationship between the bit rate register setting
and the baud rate, see section 14.3.8, Bit Rate Register
(BRR). n is the decimal representation of the value of n in
BRR (see section 14.3.8, Bit Rate Register (BRR)).
Description
Transmit Interrupt Enable
When this bit is set to 1, the TXI interrupt request is
enabled.
Receive Interrupt Enable
When this bit is set to 1, RXI and ERI interrupt requests
are enabled.
Transmit Enable
When this bit is set to 1, transmission is enabled.
Receive Enable
When this bit is set to 1, reception is enabled.
clock (n = 0)
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