HD64F3694FY Renesas Electronics America, HD64F3694FY Datasheet - Page 255
HD64F3694FY
Manufacturer Part Number
HD64F3694FY
Description
IC H8 MCU FLASH 32K 48-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet
1.HD64F3694GFYV.pdf
(452 pages)
Specifications of HD64F3694FY
Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI
Peripherals
PWM, WDT
Number Of I /o
29
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3694FYJV
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Company:
Part Number:
HD64F3694FYV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Yes
No
No
Figure 14.17 Sample Multiprocessor Serial Reception Flowchart (1)
Read OER and FER flags in SSR
Read OER and FER flags in SSR
Read receive data in RDR
Read receive data in RDR
Set MPIE bit in SCR3 to 1
Clear RE bit in SCR3 to 0
Read RDRF flag in SSR
Read RDRF flag in SSR
All data received?
This station’s ID?
Start reception
FER+OER = 1
FER+OER = 1
RDRF = 1
RDRF = 1
<End>
Yes
Yes
Yes
No
No
No
[A]
Yes
No
Yes
[3]
[1]
[2]
Error processing
Section 14 Serial Communication Interface 3 (SCI3)
(Continued on
[4]
next page)
[5]
[1]
[2]
[3]
[4]
[5]
Set the MPIE bit in SCR3 to 1.
Read OER and FER in SSR to check for
errors. Receive error processing is performed
in cases where a receive error occurs.
Read SSR and check that the RDRF flag is
set to 1, then read the receive data in RDR
and compare it with this station’s ID.
If the data is not this station’s ID, set the MPIE
bit to 1 again.
When data is read from RDR, the RDRF flag
is automatically cleared to 0.
Read SSR and check that the RDRF flag is
set to 1, then read the data in RDR.
If a receive error occurs, read the OER and
FER flags in SSR to identify the error. After
performing the appropriate error processing,
ensure that the OER and FER flags are all
cleared to 0.
Reception cannot be resumed if either of
these flags is set to 1.
In the case of a framing error, a break can be
detected by reading the RxD pin value.
Rev.5.00 Nov. 02, 2005 Page 225 of 418
REJ09B0028-0500
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