XC68HC705B32CFN Freescale Semiconductor, XC68HC705B32CFN Datasheet - Page 72

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XC68HC705B32CFN

Manufacturer Part Number
XC68HC705B32CFN
Description
IC MCU 2.1MHZ 32K OTP 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of XC68HC705B32CFN

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SCI
Peripherals
POR, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Eeprom Size
256 x 8
Ram Size
528 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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5
Freescale
5-14
Note:
Note:
flag and TCMP1,2
1
1) The output compare flag is set at the timer state T11 that follows the comparison match ($F457 in this example).
Compare register
timer clocks
timer clocks
Output compare
Output compare
processor clock
processor clock
Timer overflow
The CPU write to the compare registers may take place at any time, but a compare only occurs at timer state
T01. Thus a four cycle difference may exist between the write to the compare register and the actual compare.
Internal
Internal
The timer overflow flag is set at timer state T11 (transition of counter from $FFFF to $0000). It is cleared
by a read of the timer status register during the internal processor clock high time, followed by a read of the
counter low register.
Internal
counter
register
Internal
counter
Figure 5-4 Timer state timing diagram for output compare
16-bit
16-bit
latch
Figure 5-5 Timer state timing diagram for timer overflow
flag
T00
T01
T10
T11
T00
T01
T10
T11
CPU writes $F457
PROGRAMMABLE TIMER
$FFFF
$F456
(Note 1)
(Note 1)
(Note 2)
$F457
$0000
$F458
$0001
$F457
$F459
$0002
MC68HC05B6
Rev. 4.1

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