XC68HC705B32CFN Freescale Semiconductor, XC68HC705B32CFN Datasheet - Page 51

• Manufacturer Part Number: XC68HC705B32CFN
• Description: IC MCU 2.1MHZ 32K OTP 52-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of XC68HC705B32CFN

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SCI
• Peripherals: POR, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Eeprom Size: 256 x 8
• Ram Size: 528 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

(1) The POR bit is set each time there is a power-on reset.
(2) The state of the WDOG bit after reset is dependent on the mask option selected; 1=watchdog enabled, 0=watchdog disabled.
3.8
POR — Power-on reset bit (see
This bit is set each time the device is powered on. Therefore, the state of the POR bit allows the
user to make a software distinction between a power-on and an external reset. This bit cannot be
set by software and is cleared by writing it to zero.
INTP, INTN — External interrupt sensitivity options (see
These two bits allow the user to select which edge the IRQ pin will be sensitive to (see
Both bits can be written to only while the I-bit is set, and are cleared by power-on or external reset,
thus the device is initialised with negative edge and low level sensitivity.
INTE — External interrupt enable (see
The INTE bit can be written to only while the I-bit is set, and is set by power-on or external reset,
thus enabling the external interrupt function.
MC68HC05B6
Rev. 4.1
1 (set)
0 (clear) –
1 (set)
0 (clear) –
Miscellaneous
Miscellaneous register
–
–
A power-on reset has occurred.
No power-on reset has occurred.
External interrupt function (IRQ) enabled.
External interrupt function (IRQ) disabled.
INTP
0
0
1
1
Address
$000C POR
MEMORY AND REGISTERS
Section
INTN
Table 3-3 IRQ sensitivity
0
1
0
1
bit 7
(1)
Negative edge and low level sensitive
Negative edge only
Positive edge only
Positive and negative edge sensitive
Section
9.1)
INTP
bit 6
IRQ sensitivity
9.2)
INTN
bit 5
INTE
bit 4
Section
SFA
bit 3
9.2)
bit 2
SFB
bit 1
SM WDOG
bit 0
Table
(2)
Freescale
?001 000?
on reset
State
3-3).
3-9
3