XC68HC705B32CFN Freescale Semiconductor, XC68HC705B32CFN Datasheet - Page 222

• Manufacturer Part Number: XC68HC705B32CFN
• Description: IC MCU 2.1MHZ 32K OTP 52-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of XC68HC705B32CFN

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SCI
• Peripherals: POR, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Eeprom Size: 256 x 8
• Ram Size: 528 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

14
(1) This bit is set each time there is a power-on reset.
(2) The state of the WDOG bit after reset is dependent upon the mask option selected; 1=watchdog enabled, 0=watchdog disabled.
(3) This register is implemented in EEPROM; therefore reset has no effect on the individual bits.
(4) This register is implemented in EPROM; therefore reset has no effect on the individual bits.
Freescale
F-4
Pulse length modulation A (PLMA)
Pulse length modulation B (PLMB)
EPROM/EEPROM/ECLK control
Mask option register (MOR)
Port C data direction (DDRC)
Port A data direction (DDRA)
Port B data direction (DDRB)
A/D status/control (ADSTAT)
SCI control 1 (SCCR1)
SCI control 2 (SCCR2)
Output compare high 1
Output compare high 2
SCI baud rate (BAUD)
Output compare low 1
Alternate counter high
Output compare low 2
Port C data (PORTC)
Port D data (PORTD)
Port A data (PORTA)
Port B data (PORTB)
Alternate counter low
A/D data (ADDATA)
Timer control (TCR)
Input capture high 1
Input capture high 2
Timer status (TSR)
Input capture low 1
Input capture low 2
SCI status (SCSR)
Timer counter high
Options (OPTR)
Timer counter low
SCI data (SCDR)
Register name
Miscellaneous
(3)
(4)
Address bit 7
$3DFE
$000A
$000B
$000C POR
$000D
$000E
$000F
$001A
$001B
$001C
$001D
$001E
$001F
$0000
$0001
$0002
$0003
$0004
$0005
$0006
$0007
$0008
$0009
$0010
$0011
$0012
$0013
$0014
$0015
$0016
$0017
$0018
$0019
$0100
Table F-1 Register outline
COCO ADRC ADON
SPC1
TDRE
ICF1
PD7
ICIE
TIE
R8
MC68HC705B16N
(1)
OCF1
SPC0
OCIE
INTP
TCIE
bit 6
PD6
TC
T8
E6LAT E6PGM ECLK E1ERA E1LAT E1PGM 0000 0000
RDRF
SCT1
INTN
TOIE FOLV2 FOLV1 OLV2 IEDG1 OLVL1 0000 00u0
bit 5
TOF
PD5
RIE
SCT0
RTIM RWAT WWAT PBPD PCPD Not affected
INTE
IDLE
bit 4
ICF2
PD4
ILIE
M
0
WAKE CPOL CPHA LBCL Undefined
OCF2
SCT0
bit 3
PD3
CH3
SFA
OR
TE
SCR2 SCR1 SCR0 00uu uuuu
ECLK
PC2/
bit 2
PD2
CH2
SFB
RE
NF
EE1P
RWU
bit 1
PD1
CH1
SM WDOG
FE
MC68HC05B6
bit 0
SBK
SEC Not affected
PD0
CH0
(2)
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
?001 000?
0000 0000
1100 000u
0000 0000
1111 1111
1111 1100
1111 1111
1111 1100
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Rev. 4.1
State on
reset