MC68HC908GR16VFJ Freescale Semiconductor, MC68HC908GR16VFJ Datasheet - Page 54

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MC68HC908GR16VFJ

Manufacturer Part Number
MC68HC908GR16VFJ
Description
IC MCU 16K FLASH 8MHZ SPI 32LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908GR16VFJ

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
LIN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Part Number:
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Quantity:
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Analog-to-Digital Converter (ADC)
AIEN — ADC Interrupt Enable Bit
ADCO — ADC Continuous Conversion Bit
ADCH4–ADCH0 — ADC Channel Select Bits
The voltage levels supplied from internal reference nodes, as specified in
operation of the ADC converter both in production test and for user applications.
54
When this bit is set, an interrupt is generated at the end of an ADC conversion. The interrupt signal is
cleared when the data register is read or the status/control register is written. Reset clears the AIEN bit.
When set, the ADC will convert samples continuously and update the ADR register at the end of each
conversion. Only one conversion is completed between writes to the ADSCR when this bit is cleared.
Reset clears the ADCO bit.
ADCH4–ADCH0 form a 5-bit field which is used to select one of 16 ADC channels. Only eight
channels, AD7–AD0, are available on this MCU. The channels are detailed in
be taken when using a port pin as both an analog and digital input simultaneously to prevent switching
noise from corrupting the analog signal. See
The ADC subsystem is turned off when the channel select bits are all set to 1. This feature allows for
reduced power consumption for the MCU when the ADC is not being used.
1 = ADC interrupt enabled
0 = ADC interrupt disabled
1 = Continuous ADC conversion
0 = One ADC conversion
1. If any unused channels are selected, the resulting ADC conversion will be unknown or
ADCH4
Recovery from the disabled state requires one conversion cycle to stabilize.
reserved.
0
0
0
0
0
0
0
0
0
1
1
1
1
ADCH3
0
0
0
0
0
0
0
0
1
1
1
1
1
Table 3-1. Mux Channel Select
MC68HC908GR16 Data Sheet, Rev. 5.0
ADCH2
0
0
0
0
1
1
1
1
0
1
1
1
1
Table
ADCH1
NOTE
0
0
1
1
0
0
1
1
0
0
0
1
1
3-1.
ADCH0
0
1
0
1
0
1
0
1
0
0
1
0
1
(1)
Table
ADC power off
Input Select
PTB0/AD0
PTB1/AD1
PTB2/AD2
PTB3/AD3
PTB4/AD4
PTB5/AD5
PTB6/AD6
PTB7/AD7
Unused
V
3-1, are used to verify the
V
REFH
REFL
Table
Freescale Semiconductor
3-1. Care should

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