MC68HC908GR16VFJ Freescale Semiconductor, MC68HC908GR16VFJ Datasheet - Page 121

• Manufacturer Part Number: MC68HC908GR16VFJ
• Description: IC MCU 16K FLASH 8MHZ SPI 32LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GR16VFJ

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: LIN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Chapter 12
Input/Output Ports (PORTS)
12.1 Introduction
Bidirectional input-output (I/O) pins form five parallel ports. All I/O pins are programmable as inputs or
outputs. All individual bits within port A, port C, and port D are software configurable with pullup devices
if configured as input port bits. The pullup devices are automatically and dynamically disabled when a port
bit is switched to output mode.
Freescale Semiconductor
Addr.
$0000
$0001
$0002
$0003
$0004
Data Direction Register A
Register Name
Port A Data Register
Port B Data Register
Port C Data Register
Port D Data Register
Connect any unused I/O pins to an appropriate logic level, either V
V
termination reduces excess current consumption and the possibility of
electrostatic damage.
Not all port pins are bonded out in all packages. Care sure be taken to make
any unbonded port pins an output to reduce them from being floating inputs.
SS
See page 124.
See page 126.
See page 128.
See page 130.
See page 124.
. Although the I/O ports do not require termination for proper operation,
(DDRA)
(PTC)
(PTD)
(PTA)
(PTB)
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Figure 12-1. I/O Port Register Summary
DDRA7
PTD7
PTA7
PTB7
MC68HC908GR16 Data Sheet, Rev. 5.0
Bit 7
0
0
= Unimplemented
DDRA6
PTC6
PTD6
PTA6
PTB6
6
0
NOTE
DDRA5
PTC5
PTD5
PTA5
PTB5
5
0
DDRA4
Unaffected by reset
Unaffected by reset
Unaffected by reset
Unaffected by reset
PTA4
PTB4
PTC4
PTD4
4
0
DDRA3
PTA3
PTB3
PTC3
PTD3
3
0
DDRA2
PTA2
PTB2
PTC2
PTD2
2
0
DD
or
DDRA1
PTA1
PTB1
PTC1
PTD1
1
0
DDRA0
PTA0
PTB0
PTC0
PTD0
Bit 0
0
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