MC68HC908EY16CFA Freescale Semiconductor, MC68HC908EY16CFA Datasheet - Page 84

• Manufacturer Part Number: MC68HC908EY16CFA
• Description: IC MCU 16K FLASH 8MHZ SPI 32LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908EY16CFA

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: LIN, SCI, SPI
• Peripherals: POR, PWM
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: HC08EY
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: ESCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE, ZK-HC08EY-A
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

Internal Clock Generator (ICG) Module
8.3.3.2 External Clock Input Path
The external clock input path is the means by which the microcontroller uses an external clock source.
The input to the path is the PTC4/OSC1 pin and the output is the external clock (ECLK). The path, which
contains input buffering, is enabled when the external clock generator enable signal (ECGEN) is set.
When not enabled, the PTC4/OSC1 pin reverts to its port function.
8.3.4 Clock Monitor Circuit
The ICG contains a clock monitor circuit which, when enabled, will continuously monitor both the external
clock (ECLK) and the internal clock (ICLK) to determine if either clock source has been corrupted. The
clock monitor circuit, shown in
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Clock monitor reference generator
Internal clock activity detector
External clock activity detector
EXTXTALEN
EXTSLOW
NAME
ECGEN
NAME
ICGEN
CMON
FICGS
IBASE
ECLK
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
Figure 8-5. Clock Monitor Block Diagram
Figure
CONFIGURATION REGISTER BIT
TOP LEVEL SIGNAL
8-5, contains these blocks:
FICGS
IBASE
ICGEN
EREF
IBASE
ICGON
EXTXTALEN
EXTSLOW
ECGS
ECLK
ECGEN
IREF
ECGEN
ECLK
CMON
CMON
ESTBCLK
DETECTOR
DETECTOR
ACTIVITY
ACTIVITY
ICLK
ECLK
GENERATOR
REFERENCE
ESTBCLK
EREF
ECGS
EOFF
IREF
IOFF
ICGS
NAME
NAME
MODULE SIGNAL
REGISTER BIT
ECGS
ICGS
IOFF
EOFF
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