MC68HC908EY16CFA Freescale Semiconductor, MC68HC908EY16CFA Datasheet - Page 270

• Manufacturer Part Number: MC68HC908EY16CFA
• Description: IC MCU 16K FLASH 8MHZ SPI 32LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908EY16CFA

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: LIN, SCI, SPI
• Peripherals: POR, PWM
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: HC08EY
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: ESCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE, ZK-HC08EY-A
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

Revision History
Changes from Rev 7.0 published in March 2004 to Rev 8 published in July 2005
270
Development Support
Low-Voltage Inhibit
System Integration
Input/Output (I/O)
Timer Interface A
Timer Interface B
MC68HC908EY8
Communications
Enhanced Serial
Serial Peripheral
Generator (ICG)
Interface (ESCI)
Ports (PORTS)
(TIMA) Module
(TIMB) Module
Interface (SPI)
Specifications
Internal Clock
Module (SIM)
(LVI) Module
Appendix A
Electrical
Section
Memory
Module
Module
Module
Page (in Rev 8)
163, 164
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
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80
Added ICGT at $FF80 in Figure 2-1 and Figure 2-2.
Removed overbars from OSC1 and OSC2 in Figure 8-1.
Added 8.7.4 ICG Trim Value.
New introductory paragraph in 11.3 Functional Description. Modified
sections 11.3.1, 11.3.2, 11.5.1, 11.5.2.
Changed “to disable LVI resets” to “to enable LVI resets” in 11.3.1 Polled LVI
Operation.
Deleted “for 32 to 40 CGMXCLK cycles” from last sentence in 11.3.4 LVI
Status Register.
Modified Figure 12-13.
Changed “11-bit” to “13-bit” and “12-bit” to “14-bit” in Table 13-6.
Changed “...is clocked with one half...” to “...is clocked with one quarter...”
New introductory paragraph in 14.3.1 External Pin Reset.
Updated and moved Table 14-2.
Changed SS pin to from input/output to input only in Figure 15-2.
Changed PTEx/TCHx to PTDx/TCHx in Figure 17-3.
Added para to note after TSTOP — TIMA Stop Bit
New Table 17-2.
Changed “TCHxH–TCHxL” to ”TBCHxH–TBCHxL” in 18.3.2 Input Capture.
Changed PTEx/TCHx to PTBx/TCHx in Figure 18-3.
Added para to note after TSTOP — TIMB Stop Bit
New Table 18-2.
Whole chapter replaced with new version.
Changed values of Hi-Z leakage current in 20.5 DC Electrical
Characteristics.
Changed specification for resistance and capacitance values for
EXTSLOW = 1 and EXTSLOW = 0, in 20.8 External Oscillator
Characteristics.
Added appendix describing the MC68HC908EY8
Description of change
Freescale Semiconductor