MC68HC908LJ12CFU Freescale Semiconductor, MC68HC908LJ12CFU Datasheet - Page 200

no-image

MC68HC908LJ12CFU

Manufacturer Part Number
MC68HC908LJ12CFU
Description
IC MCU 12K FLASH 8MHZ 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908LJ12CFU

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
32
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908LJ12CFU
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68HC908LJ12CFU
Manufacturer:
MOT
Quantity:
80
Part Number:
MC68HC908LJ12CFU
Manufacturer:
FRE/MOT
Quantity:
20 000
Part Number:
MC68HC908LJ12CFUE
Manufacturer:
FREESCALE
Quantity:
5 588
Timer Interface Module (TIM)
11.10.1 TIM Status and Control Register
Technical Data
200
Address: T1SC, $0020 and T2SC, $002B
The TIM status and control register (TSC):
TOF — TIM Overflow Flag Bit
TOIE — TIM Overflow Interrupt Enable Bit
Reset:
Read:
Write:
This read/write flag is set when the TIM counter reaches the modulo
value programmed in the TIM counter modulo registers. Clear TOF by
reading the TIM status and control register when TOF is set and then
writing a logic 0 to TOF. If another TIM overflow occurs before the
clearing sequence is complete, then writing logic 0 to TOF has no
effect. Therefore, a TOF interrupt request cannot be lost due to
inadvertent clearing of TOF. Reset clears the TOF bit. Writing a
logic 1 to TOF has no effect.
This read/write bit enables TIM overflow interrupts when the TOF bit
becomes set. Reset clears the TOIE bit.
1 = TIM counter has reached modulo value
0 = TIM counter has not reached modulo value
1 = TIM overflow interrupts enabled
0 = TIM overflow interrupts disabled
Enables TIM overflow interrupts
Flags TIM overflows
Stops the TIM counter
Resets the TIM counter
Prescales the TIM counter clock
Figure 11-4. TIM Status and Control Register (TSC)
Bit 7
TOF
0
0
Timer Interface Module (TIM)
= Unimplemented
TOIE
6
0
TSTOP
5
1
TRST
4
0
0
3
0
0
MC68HC908LJ12
PS2
Freescale Semiconductor
2
0
PS1
1
0
Rev. 2.1
Bit 0
PS0
0

Related parts for MC68HC908LJ12CFU