MC912DT128ACPV Freescale Semiconductor, MC912DT128ACPV Datasheet - Page 463

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MC912DT128ACPV

Manufacturer Part Number
MC912DT128ACPV
Description
IC 8MHZ 16 BIT MICROCONTROLLER
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912DT128ACPV

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
67
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
KMC912DT128ACPV
Q1195202

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CGM — See “clock generator module (CGM).”
clear — To change a bit from logic 1 to logic 0; the opposite of set.
clock — A square wave signal used to synchronize events in a computer.
clock generator module (CGM) — The CGM module generates a base clock signal from which
comparator — A device that compares the magnitude of two inputs. A digital comparator defines
computer operating properly module (COP) — A counter module that resets the MCU if
condition code register (CCR) — An 8-bit register in the CPU that contains the interrupt mask
control bit — One bit of a register manipulated by software to control the operation of the
control unit — One of two major units of the CPU. The control unit contains logic functions that
COP — See "computer operating properly module (COP)."
CPU — See “central processor unit (CPU).”
CPU12 — The CPU of the MC68HC12 Family.
CPU clock — Bus clock select bits BCSP and BCSS in the clock select register (CLKSEL)
MC68HC912DT128A — Rev 4.0
MOTOROLA
the system clocks are derived. The CGM may include a crystal oscillator circuit and/or
phase-locked loop (PLL) circuit.
the equality or relative differences between two binary numbers.
allowed to overflow.
bit and five bits that indicate the results of the instruction just executed.
module.
synchronize the machine and direct various operations. The control unit decodes
instructions and generates the internal control signals that perform the requested
operations. The outputs of the control unit drive the execution unit, which contains the
arithmetic logic unit (ALU), CPU registers, and bus interface.
determine which clock drives SYSCLK for the main system, including the CPU and buses.
When EXTALi drives the SYSCLK, the CPU or bus clock frequency (f
EXTALi frequency divided by 2.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Glossary
o
) is equal to the
Technical Data
Glossary
463

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