MC912DT128ACPV Freescale Semiconductor, MC912DT128ACPV Datasheet - Page 158
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
MC912DT128ACPV
Manufacturer Part Number
MC912DT128ACPV
Description
IC 8MHZ 16 BIT MICROCONTROLLER
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet
1.MC912DG128ACPVER.pdf
(478 pages)
Specifications of MC912DT128ACPV
Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
67
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
KMC912DT128ACPV
Q1195202
Q1195202
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC912DT128ACPVE
Manufacturer:
MEANWELL
Quantity:
1 000
Company:
Part Number:
MC912DT128ACPVE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Clock Functions
12.3 Clock Sources
Technical Data
158
A compatible external clock signal can be applied to the EXTAL pin or
the MCU can generate a clock signal using an on-chip oscillator circuit
and an external crystal or ceramic resonator. The MCU uses several
types of internal clock signals derived from the primary clock signal:
TxCLK clocks are used by the CPU.
ECLK and PCLK are used by the bus interfaces, SPI, PWM, ATD0 and
ATD1.
MCLK is either PCLK or XCLK, and drives on-chip modules such as
SCI0, SCI1 and ECT.
XCLK drives on-chip modules such as RTI, COP and restart-from-stop
delay time.
SLWCLK is used as a calibration output signal.
The MSCAN module is clocked by EXTALi or SYSCLK, under control of
an MSCAN bit.
The clock monitor is clocked by EXTALi.
The BDM system is clocked by BCLK or ECLK, under control of a BDM
bit.
A slow mode clock divider is included to deliver a lower clock frequency
for the SCI baud rate generators, the ECT timer module, and the RTI and
COP clocks. The slow clock bus frequencies divide the crystal frequency
in a programmable range of 4 to 252, with steps of 4. This is very useful
for low power operation.
See the
shows some of the timing relationships.
Freescale Semiconductor, Inc.
For More Information On This Product,
Clock Divider Chains
Go to: www.freescale.com
Clock Functions
section for further details.
MC68HC912DT128A — Rev 4.0
Figure 12-1
MOTOROLA
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