AT32UC3A0512-ALUR Atmel, AT32UC3A0512-ALUR Datasheet - Page 462

MCU 32BIT 512KB FLASH 144-LQFP

AT32UC3A0512-ALUR

Manufacturer Part Number
AT32UC3A0512-ALUR
Description
MCU 32BIT 512KB FLASH 144-LQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheets

Specifications of AT32UC3A0512-ALUR

Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
109
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
ATEVK1105 - KIT EVAL FOR AT32UC3A0ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3A0512-ALUR
Manufacturer:
ATMEL
Quantity:
2 155
Part Number:
AT32UC3A0512-ALUR
Manufacturer:
Atmel
Quantity:
10 000
Company:
Part Number:
AT32UC3A0512-ALUR
Quantity:
57
29.7.5
Register Name:
Access Type:
This register points to the entry in the receive buffer queue (descriptor list) currently being used. It is written with the start
location of the receive buffer descriptor list. The lower order bits increment as buffers are used up and wrap to their original
values after either 1024 buffers or when the wrap bit of the entry is set.
Reading this register returns the location of the descriptor currently being accessed. This value increments as buffers are
used. Software should not use this register for determining where to remove received frames from the queue as it con-
stantly changes as new frames are received. Software should instead work its way through the buffer descriptor queue
checking the used bits.
Receive buffer writes also comprise bursts of two words and, as with transmit buffer reads, it is recommended that bit 2 is
always written with zero to prevent a burst crossing a 1K boundary, in violation of the System Bus specification.
• ADDR:
Written with the address of the start of the receive queue, reads as a pointer to the current buffer being used.
32058J–AVR32–04/11
31
23
15
7
Receive buffer queue pointer address
Receive Buffer Queue Pointer Register
30
22
14
RBQP
6
Read/Write
29
21
13
5
ADDR
28
20
12
4
ADDR
ADDR
ADDR
27
19
11
3
26
18
10
2
25
17
9
1
AT32UC3A
24
16
8
0
462

Related parts for AT32UC3A0512-ALUR