DSPIC30F5015T-20I/PT Microchip Technology, DSPIC30F5015T-20I/PT Datasheet - Page 39

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DSPIC30F5015T-20I/PT

Manufacturer Part Number
DSPIC30F5015T-20I/PT
Description
IC DSPIC MCU/DSP 66K 64TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F5015T-20I/PT

Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
66KB (22K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
For Use With
AC30F008 - MODULE SKT FOR DSPIC30F 64TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F5015T-20I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
3.2.5
An 8 Kbyte ‘near’ data space is reserved in X address
memory space between 0x0000 and 0x1FFF, which is
directly addressable via a 13-bit absolute address field
within all memory direct instructions. The remaining X
address space and all of the Y address space is
addressable indirectly. Additionally, the whole of X data
space is addressable using MOV instructions, which
support memory direct addressing with a 16-bit
address field.
The stack pointer always points to the first available
free word and grows from lower addresses towards
higher addresses. It pre-decrements for stack pops and
post-increments for stack pushes, as shown in
Figure 3-7. Note that for a PC push during any CALL
instruction, the MSB of the PC is zero-extended before
the push, ensuring that the MSB is always clear.
 2004 Microchip Technology Inc.
Note:
NEAR DATA SPACE
A PC push during exception processing
will concatenate the SRL register to the
MSB of the PC prior to the push.
Preliminary
3.2.6
The dsPIC device contains a software stack. W15 is
used as the Stack Pointer.
There is a Stack Pointer Limit register (SPLIM) associ-
ated with the stack pointer. SPLIM is uninitialized at
Reset. As is the case for the stack pointer, SPLIM<0>
is forced to ‘0’, because all stack operations must be
word aligned. Whenever an effective address (EA) is
generated using W15 as a source or destination
pointer, the address thus generated is compared with
the value in SPLIM. If the contents of the Stack Pointer
(W15) and the SPLIM register are equal and a push
operation is performed, a Stack Error Trap will not
occur. The Stack Error Trap will occur on a subsequent
push operation. Thus, for example, if it is desirable to
cause a Stack Error Trap when the stack grows beyond
address 0x2000 in RAM, initialize the SPLIM with the
value, 0x1FFE.
Similarly, a Stack Pointer Underflow (Stack Error) trap
is generated when the stack pointer address is found to
be less than 0x0800, thus preventing the stack from
interfering with the Special Function Register (SFR)
space.
A write to the SPLIM register should not be immediately
followed by an indirect read operation using W15.
FIGURE 3-7:
0x0000
15
000000000
SOFTWARE STACK
<Free Word>
PC<15:0>
PC<22:16>
CALL STACK FRAME
dsPIC30F
0
W15 (before CALL)
W15 (after CALL)
PUSH: [W15++]
POP: [--W15]
DS70082G-page 37

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