DSPIC30F5015T-20I/PT Microchip Technology, DSPIC30F5015T-20I/PT Datasheet - Page 25

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DSPIC30F5015T-20I/PT

Manufacturer Part Number
DSPIC30F5015T-20I/PT
Description
IC DSPIC MCU/DSP 66K 64TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F5015T-20I/PT

Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
66KB (22K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
For Use With
AC30F008 - MODULE SKT FOR DSPIC30F 64TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F5015T-20I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
3.
FIGURE 2-4:
4.
FIGURE 2-5:
5.
FIGURE 2-6:
 2004 Microchip Technology Inc.
1. MOV W0,0x1234
2. MOV.D [W0++],W1
3. MOV W1,0x00AA
3a.Stall
4. MOV 0x0CC, W0
1. MOV #0x1234,W0
2. TBLRDL [W0++],W1
3. MOV #0x00AA,W1
3a.Table Operation
4. MOV #0x0CC,W0
1. MOV #0x1234,W0
2. GOTO LABEL
2a.Second Word
3. Instruction @ address LABEL
4. BSET W1, #BIT3
One-word, two-cycle instructions that are not
flow control instructions: the only instructions of
this type are the MOV.D (load and store double
word) instructions, as shown in Figure 2-4.
Table read/write instructions. These instructions
will suspend the fetching to insert a read or write
cycle to the program memory. The instruction
fetched, while executing the table operation, is
saved for 1 cycle and executed in the cycle
immediately after the table operation, as shown
in Figure 2-5.
Two-word instructions for CALL and GOTO. In
these instructions, the fetch after the instruction
provides the remainder of the jump or call desti-
nation address. These instructions require 2
cycles to execute, 1 cycle to fetch the 2 instruc-
tion words (enabled by a high speed path on the
second fetch), and 1 cycle to flush the pipeline,
as shown in Figure 2-6.
INSTRUCTION PIPELINE FLOW: 1-WORD, 2-CYCLE MOV.D OPERATIONS
INSTRUCTION PIPELINE FLOW: 1-WORD, 2-CYCLE TABLE OPERATIONS
INSTRUCTION PIPELINE FLOW: 2-WORD, 2-CYCLE GOTO, CALL
Fetch 1
Fetch 1
Fetch 1
T
T
T
CY
CY
CY
0
0
0
Execute 1
Fetch 2
Execute 1
Fetch 2
Execute 1
Fetch 2L
T
T
T
CY
CY
CY
1
1
1
Preliminary
Execute 2
R/W Cycle 1
Fetch 3
Execute 2
Fetch 3
Update PC
Fetch 2H
T
T
T
CY
CY
CY
2
2
2
Execute 2
R/W Cycle2
Stall
Execute 2
Read Cycle
Bus Read Execute 3
NOP
Fetch
LABEL
T
T
T
CY
CY
CY
3
3
3
Execute 3
Fetch 4
Fetch 4
Execute
LABEL
Fetch 4
T
T
T
CY
CY
CY
4
4
4
dsPIC30F
Execute 4
Execute 4
Execute 4
DS70082G-page 23
T
T
T
CY
CY
CY
5
5
5

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