PIC18LF8520-I/PTG Microchip Technology, PIC18LF8520-I/PTG Datasheet - Page 18

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PIC18LF8520-I/PTG

Manufacturer Part Number
PIC18LF8520-I/PTG
Description
IC MCU FLASH 16KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets

Specifications of PIC18LF8520-I/PTG

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18F6520/8520/6620/8620/6720/8720
TABLE 1-2:
DS39609B-page 16
RE0/RD/AD8
RE1/WR/AD9
RE2/CS/AD10
RE3/AD11
RE4/AD12
RE5/AD13
RE6/AD14
RE7/CCP2/AD15
Legend: TTL = TTL compatible input
Note 1:
RE0
RD
AD8
RE1
WR
AD9
RE2
CS
AD10
RE3
AD11
RE4
AD12
RE5
AD13
RE6
AD14
RE7
CCP2
AD15
Pin Name
2:
3:
4:
5:
6:
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(1,4)
ST = Schmitt Trigger input with CMOS levels
I
P
Alternate assignment for CCP2 when CCP2MX is not selected (all operating modes except
Microcontroller).
Default assignment when CCP2MX is set.
External memory interface functions are only available on PIC18F8X20 devices.
CCP2 is multiplexed with this pin by default when configured in Microcontroller mode. Otherwise, it is
multiplexed with either RB3 or RC1.
PORTH and PORTJ are only available on PIC18F8X20 (80-pin) devices.
AV
proper operation of the part in user or ICSP modes. See parameter D001A for details.
DD
= Input
= Power
must be connected to a positive supply and AV
PIC18FXX20 PINOUT I/O DESCRIPTIONS (CONTINUED)
PIC18F6X20 PIC18F8X20
64
63
62
61
60
59
2
1
Pin Number
78
77
76
75
74
73
4
3
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
CMOS = CMOS compatible input or output
Analog = Analog input
O
OD
Buffer
Type
SS
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
ST
ST
ST
ST
ST
ST
ST
ST
ST
must be connected to a ground reference for
= Output
= Open-Drain (no P diode to V
PORTE is a bidirectional I/O port.
Digital I/O.
Read control for Parallel Slave Port
(see WR and CS pins).
External memory address/data 8.
Digital I/O.
Write control for Parallel Slave Port
(see CS and RD pins).
External memory address/data 9.
Digital I/O.
Chip select control for Parallel Slave
Port (see RD and WR).
External memory address/data 10.
Digital I/O.
External memory address/data 11.
Digital I/O.
External memory address/data 12.
Digital I/O.
External memory address/data 13.
Digital I/O.
External memory address/data 14.
Digital I/O.
Capture2 input/Compare2 output/
PWM2 output.
External memory address/data 15.
 2004 Microchip Technology Inc.
Description
DD
)

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