ATMEGA162V-1MC Atmel, ATMEGA162V-1MC Datasheet - Page 186
![IC MCU AVR 16K 1.8V 8MHZ 44-QFN](/photos/12/13/121316/313-44-qfn_sml.jpg)
ATMEGA162V-1MC
Manufacturer Part Number
ATMEGA162V-1MC
Description
IC MCU AVR 16K 1.8V 8MHZ 44-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA162V-1MC
Core Processor
AVR
Core Size
8-Bit
Speed
1MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-VQFN Exposed Pad
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
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USART Control and Status
Register C – UCSRC
186
ATmega162(V/U/L)
(1)
Note:
• Bit 7 – URSEL: Register Select
This bit selects between accessing the UCSRC or the UBRRH Register. It is read as
one when reading UCSRC. The URSEL must be one when writing the UCSRC.
• Bit 6 – UMSEL: USART Mode Select
This bit selects between asynchronous and synchronous mode of operation.
Table 73. UMSEL Bit Settings
• Bit 5:4 – UPM1:0: Parity Mode
These bits enable and set type of parity generation and check. If enabled, the transmit-
ter will automatically generate and send the parity of the transmitted data bits within
each frame. The receiver will generate a parity value for the incoming data and compare
it to the UPM0 setting. If a mismatch is detected, the UPE flag in UCSRA will be set.
Table 74. UPM Bits Settings
• Bit 3 – USBS: Stop Bit Select
This bit selects the number of stop bits to be inserted by the transmitter. The receiver
ignores this setting.
Table 75. USBS Bit Settings
Bit
Read/Write
Initial Value
UPM1
1. The UCSRC Register shares the same I/O location as the UBRRH Register. See the
UMSEL
0
0
1
1
“Accessing UBRRH/ UCSRC Registers” on page 181 section which describes how to
access this register.
0
1
URSEL
USBS
R/W
7
1
0
1
UMSEL
R/W
6
0
UPM0
Mode
Asynchronous Operation
Synchronous Operation
0
1
0
1
UPM1
R/W
5
0
UPM0
R/W
Parity Mode
Disabled
Reserved
Enabled, Even Parity
Enabled, Odd Parity
4
0
USBS
R/W
3
0
UCSZ1
Stop Bit(s)
R/W
2
1
1-bit
2-bit
UCSZ0
R/W
1
1
UCPOL
R/W
0
0
2513C–AVR–09/02
UCSRC
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