ATMEGA161L-4PC Atmel, ATMEGA161L-4PC Datasheet - Page 62
ATMEGA161L-4PC
Manufacturer Part Number
ATMEGA161L-4PC
Description
IC AVR MCU 16K LV 4MHZ COM 40DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA161-8AC.pdf
(159 pages)
Specifications of ATMEGA161L-4PC
Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
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Prevent EEPROM
Corruption
62
ATmega161(L)
bit. When EERE has been set, the CPU is halted for four cycles before the next instruc-
tion is executed.
The user should poll the EEWE bit before starting the read operation. If a write operation
is in progress when new data or address is written to the EEPROM I/O Registers, the
write operation will be interrupted and the result is undefined.
An RC Oscillator is used to time EEPROM write access. The table below lists the typical
programming time listed for EEPROM access from CPU.
Table 21. EEPROM Access Time from CPU“See “Typical Characteristics” on page 138
to find RC Oscillator frequency.” on page 62
Note:
During periods of low V
age is too low for the CPU and the EEPROM to operate properly. These issues are the
same as for board-level systems using the EEPROM, and the same design solutions
should be applied.
An EEPROM data corruption can be caused by two situations when the voltage is too
low. First, a regular write sequence to the EEPROM requires a minimum voltage to
operate correctly. Secondly, the CPU itself can execute instructions incorrectly if the
supply voltage for executing instructions is too low.
EEPROM data corruption can easily be avoided by following these design recommen-
dations (one is sufficient):
1. Keep the AVR RESET active (low) during periods of insufficient power supply
2. Keep the AVR core in Power-down Sleep mode during periods of low V
3. Store constants in Flash memory if the ability to change memory contents from
Symbol
EEPROM write (from CPU)
voltage. An external low V
will prevent the CPU from attempting to decode and execute instructions, effec-
tively protecting the EEPROM Registers from unintentional writes.
software is not required. Flash memory cannot be updated by the CPU unless
the boot loader software supports writing to the Flash and the Boot Lock bits are
configured so that writing to the Flash memory from the CPU is allowed. See
“Boot Loader Support” on page 110 for details.
1. See “Typical Characteristics” on page 138 to find RC Oscillator frequency.
CC
, the EEPROM data can be corrupted because the supply volt-
Oscillator Cycles
CC
No. of RC
Reset Protection circuit can be applied.
2048
(1)
Min Programming
2.0 ms
Time
Max Programming
1228D–AVR–02/07
3.4 ms
Time
CC
. This
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