ATMEGA161L-4PC Atmel, ATMEGA161L-4PC Datasheet - Page 113

• Manufacturer Part Number: ATMEGA161L-4PC
• Description: IC AVR MCU 16K LV 4MHZ COM 40DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA161L-4PC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -

Fill the Temporary Buffer
Perform a Page Write
Addressing the FLASH during
Self-programming
1228D–AVR–02/07
To write an instruction word, set up the address in the Z-pointer and data in R1:R0, write
“0001” to SPMCR, and execute SPM within four clock cycles after writing SPMCR. The
content of Z6:Z1 is used to address the data in the temporary buffer. Z13:Z7 must point
to the page that is supposed to be written.
To execute a page write, set up the address in the Z-pointer, write “0101” to SPMCR,
and execute SPM within four clock cycles after writing SPMCR. The data in R1 and R0
are ignored. The page address must be written to Z13:Z7. During this operation, Z6:Z0
must be zero to ensure that the page is written correctly. When a page write operation is
completed, the Z-pointer will point to the first word in the successive page.
The Z-pointer is used to address the SPM commands.
Z15:Z14 always ignored
Z13:Z7
Z6:Z1
Z0
The only operation that does not use the Z-pointer is setting the Boot Loader Lock bits.
The content of the Z-pointer is ignored and will have no effect on the operation.
Note that the page erase and page write operation are addressed independently. There-
fore, it is of major importance that the Boot Loader software addresses the same page in
both the page erase and page write operations.
The LPM instruction also uses the Z-pointer to store the address. Since this instruction
addresses the Flash byte-by-byte, the LSB (bit Z0) of the Z-pointer is also used. See
page 16 for a detailed description.
Accidental writing into Flash program by the SPM instruction is prevented by setting up
an “SPM enable time window”. All accesses are executed by first setting I/O bits, and
then by executing SPM within four clock cycles. The I/O Register that controls the SPM
accesses is defined below.
Bit
$1F ($1F)
$1E ($1E)
Code Example
Wait:
sbrc r16,SPMEN
rjmp Wait
ldi
out
spm
page select, for page erase, page write
word select, for filling temp buffer (must be zero during page write operation)
should be zero for all SPM commands, byte select for the LPM instruction
Z15
in
r16,(1<<PGWRT) + (1<<SPMEN) ; The previous writing is completed,
SPMCR,r16
15
Z7
7
r16,SPMCR
Z14
14
Z6
6
; Wait for SPMEN to be cleared (indicates that previous
; if not cleared, keep waiting
; output to register
; start the erase operation
write operation is completed)
Z13
Z5
13
5
; read SPMCR Register
Z12
12
Z4
4
set up for next erase
Z11
Z3
11
3
Z10
Z2
10
2
ATmega161(L)
Z9
Z1
9
1
Z8
Z0
8
0
ZH
ZL
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