ATMEGA323-8PC Atmel, ATMEGA323-8PC Datasheet - Page 203

• Manufacturer Part Number: ATMEGA323-8PC
• Description: IC AVR MCU 32K 8MHZ COM 40DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA323-8PC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: ATMEGA3238PC

PROG_PAGEREAD ($7)
Data Registers
Reset Register
Programming Enable
Register
1457G–AVR–09/03
is not used to transfer data from the Shift Register. The data are automatically trans-
ferred to the Flash page buffer byte-by-byte in the Shift-DR state by an internal state
machine. This is the only active state:
•
The AVR specific public JTAG instruction to read one full Flash data page via the JTAG
port. The 1,032 bit Virtual Flash Page Read Register is selected as Data Register. This
is a virtual scan chain with length equal to the number of bits in one Flash page plus
eight. Internally the Shift Register is 8-bit. Unlike most JTAG instructions, the Capture-
DR state is not used to transfer data to the Shift Register. The data are automatically
transferred from the Flash page buffer byte-by-byte in the Shift-DR state by an internal
state machine. This is the only active state:
•
The Data Registers are selected by the JTAG Instruction Registers described in section
“Programming specific JTAG instructions” on page 202. The Data Registers relevant for
programming operations are:
•
•
•
•
•
The Reset Register is a Test Data Register used to reset the part during programming. It
is required to reset the part before entering Programming mode.
A high value in the Reset Register corresponds to pulling the external Reset low. The
part is reset as long as there is a high value present in the Reset Register. Depending
on the Fuse settings for the clock options, the part will remain reset for a Reset Time-
Out Period (refer to Table 6 on page 27) after releasing the Reset Register. The output
from this Data Register is not latched, so the reset will take place immediately, as shown
in Figure 93 on page 189.
The Programming Enable Register is a 16-bit register. The contents of this register is
compared to the programming enable signature, binary code 1010_0011_0111_0000.
When the contents of the register is equal to the programming enable signature, pro-
gramming via the JTAG port is enabled. The register is reset to 0 on Power-on Reset,
and should always be reset when leaving Programming mode.
Shift-DR: Flash page data are shifted in from TDI by the TCK input, and
automatically loaded into the Flash page one byte at a time.
Shift-DR: Flash data are automatically read one byte at a time and shifted out on
TDO by the TCK input. The TDI input is ignored.
Reset Register
Programming Enable Register
Programming Command Register
Virtual Flash Page Load Register
Virtual Flash Page Read Register
ATmega323(L)
203