ATTINY15L-1SC Atmel, ATTINY15L-1SC Datasheet - Page 51

• Manufacturer Part Number: ATTINY15L-1SC
• Description: IC AVR MCU 1K FLASH 2.7V SO8
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY15L-1SC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 1.6MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 6
• Program Memory Size: 1KB (512 x 16)
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Ram Size: -
• Connectivity: -

I/O Port B
Unconnected Pins
Alternative Functions of
Port B
The Port B Data Register –
PORTB
The Port B Data Direction
Register – DDRB
1187H–AVR–09/07
All AVR ports have true read-modify-write functionality when used as general digital I/O
ports. This means that the direction of one port pin can be changed without unintention-
ally changing the direction of any other pin with the SBI and CBI instructions. The same
applies for changing drive value (if configured as output) or enabling/disabling of pull-up
resistors (if configured as input).
Port B is a 6-bit bi-directional I/O port.
Three data memory address locations are allocated for Port B, one each for the Data
Register – PORTB, $18, Data Direction Register – DDRB, $17, and the Port B Input
Pins – PINB, $16. The Port B Input Pins address is read-only, while the Data Register
and the Data Direction Register are read/write.
Ports PB5..0 have special functions as described in the section “Pin Descriptions” on
page 4. If PB5 is not configured as External Reset, it is input with no pull-up or as an
open-drain output. All I/O pins have individually selectable pull-ups, which can be over-
ridden with pull-up disable.
The Port B output buffers on PB0 to PB4 can sink 20 mA and thus drive LED displays
directly. PB5 can sink 12 mA. When pins PB0 to PB4 are used as inputs and are exter-
nally pulled low, they will source current (I
If some pins are unused, it is recommended to ensure that these pins have a defined
level. The simplest method to ensure a defined level of an unused pin, is to enable the
internal pull-up. In this case, the pull-up will be disabled during reset. If low power con-
sumption during reset is important, it is recommended to use an external pull-up or pull-
down. Connecting unused pins directly to Vcc or GND is not recommended, since this
may cause excessive currents if the pin is accidentally configured as an output.
In ATtiny15L four Port B pins – PB2, PB3, PB4, and PB5 – have alternative functions as
inputs for the ADC. If some Port B pins are configured as outputs, it is essential that
these do not switch when a conversion is in progress. This might corrupt the result of the
conversion. During Power-down mode and ADC Noise Reduction mode, the Schmitt
triggers of the digital inputs are disconnected on these pins. This allows an analog input
voltage close to V
power consumption. The Port B pins with alternate functions are shown in Table 1 on
page 4.
When the pins PB4..0 are used for the alternate function, the DDRB and PORTB Regis-
ters have to be set according to the alternate function description. When PB5 is used as
External Reset pin, the values in the corresponding DDRB and PORTB bit are ignored.
Bit
$18
Read/Write
Initial Value
Bit
$17
Read/Write
Initial Value
R
R
7
–
0
7
–
0
CC
/2 to be present during Power-down without causing excessive
R
R
6
0
6
–
0
–
DDB5
R/W
R
5
0
5
0
–
PORTB4
DDB4
R/W
R/W
4
0
4
0
IL
) if the internal pull-ups are activated.
PORTB3
R/WS
DDB3
R/W
3
0
3
0
PORTB2
DDB2
R/W
R/W
2
0
2
0
PORTB1
DDB1
R/W
R/W
1
0
1
0
ATtiny15L
PORTB0
DDB0
R/W
R/W
0
0
0
0
PORTB
DDRB
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