ATTINY15L-1SC Atmel, ATTINY15L-1SC Datasheet - Page 32

IC AVR MCU 1K FLASH 2.7V SO8

ATTINY15L-1SC

Manufacturer Part Number
ATTINY15L-1SC
Description
IC AVR MCU 1K FLASH 2.7V SO8
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY15L-1SC

Core Processor
AVR
Core Size
8-Bit
Speed
1.6MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
1KB (512 x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Ram Size
-
Connectivity
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY15L-1SC
Manufacturer:
ATMEL
Quantity:
3 447
Part Number:
ATTINY15L-1SC
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Timer/Counter1 Output
Compare RegisterB – OCR1B
32
ATtiny15L
Figure 22. Effects of Unsynchronized OCR Latching
During the time between the write and the latch operation, a read from OCR1A will read
the contents of the temporary location. This means that the most recently written value
always will read out of OCR1A.
When OCR1A contains $00 or the top value, as specified in OCR1B Register, the output
PB1(OC1A) is held low or high according to the settings of COM1A1/COM1A0. This is
shown in Table 13.
The Output Compare Register1 (OCR1B) is an 8-bit read/write register. This register is
used in the PWM mode only, and it limits the top value to which the Timer/Counter1
keeps counting. After reaching OCR1B in PWM mode, the counter starts from $00.
Table 13. PWM Outputs when OCR1A = $00 or OCR1B
In PWM mode, the Timer Overflow Flag (TOV1) is set as in normal Timer/Counter
mode. Timer Overflow Interrupt1 operates exactly as in normal Timer/Counter mode,
i.e., it is executed when TOV1 is set provided that Timer Overflow Interrupt and global
interrupts are enabled. This also applies to the Timer Output Compare A Flag and
interrupt.
Bit
$2D
Read/Write
Initial Value
Synchronized OC1A Latch
Unsynchronized OC1A Latch
COM1A1
1
1
1
1
MSB
R/W
7
1
R/W
6
1
COM1A0
0
0
1
1
R/W
5
1
R/W
4
1
Glitch
Compare Value Changes
Compare Value Changes
OCR1B
OCR1B
OCR1B
R/W
$00
$00
3
1
R/W
2
1
R/W
1
1
Counter Value
Compare Value
PWM Output OC1A
Counter Value
Compare Value
PWM Output OC1A
Output PWMn
LSB
R/W
H
H
0
1
L
L
1187H–AVR–09/07
OCR1B

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