ATTINY15L-1PC Atmel, ATTINY15L-1PC Datasheet - Page 36
![IC AVR MCU 1K FLASH 2.7V 8DIP](/photos/6/50/65033/313-8-dip_sml.jpg)
ATTINY15L-1PC
Manufacturer Part Number
ATTINY15L-1PC
Description
IC AVR MCU 1K FLASH 2.7V 8DIP
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY15L-1PC
Core Processor
AVR
Core Size
8-Bit
Speed
1.6MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
1KB (512 x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Ram Size
-
Connectivity
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
EEPROM Read/Write
Access
The EEPROM Address
Register – EEAR
The EEPROM Data Register –
EEDR
36
ATtiny15L
The EEPROM Access Registers are accessible in the I/O space.
The write access time is in the range of 4.6 - 8.2 ms, depending on the frequency of the
calibrated RC Oscillator. See Table 16 for details. A self-timing function however, lets
the user software detect when the next byte can be written. If the user code contains
code that writes the EEPROM, some precautions must be taken. In heavily filtered
power supplies, V
device for some period of time to run at a voltage lower than specified as minimum for
the clock frequency used. CPU operation under these conditions is likely to cause the
Program Counter to perform unintentional jumps and eventually execute the EEPROM
write code. To secure EEPROM integrity, the user is advised to use an external under-
voltage reset circuit in this case.
In order to prevent unintentional EEPROM writes, a two-state write procedure must be
followed. Refer to the description of the EEPROM Control Register for details of this.
When the EEPROM is read or written, the CPU is halted for two clock cycles before the
next instruction is executed.
• Bit 7, 6 – Res: Reserved Bits
These bits are reserved bits in the ATtiny15L and will always read as zero.
• Bit 5..0 – EEAR5..0: EEPROM Address
The EEPROM Address Register (EEAR) specifies the EEPROM address in the 64 bytes
EEPROM space. The EEPROM data bytes are addresses linearly between 0 and 63.
The initial value of EEAR is undefined. A proper value must be written before the
EEPROM may be accessed.
• Bit 7..0 – EEDR7..0: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to
the EEPROM in the address given by the EEAR Register. For the EEPROM read oper-
ation, the EEDR contains the data read out from the EEPROM at the address given by
EEAR.
Bit
$1E
Read/Write
Initial vAlue
Bit
$1D
Read/Write
Initial Value
MSB
R/W
R
7
–
0
7
0
CC
is likely to rise or fall slowly on Power-up/down. This causes the
R/W
R
6
–
0
6
0
EEAR5
R/W
R/W
X
5
5
0
EEAR4
R/W
R/W
X
4
4
0
EEAR3
R/W
R/W
3
X
3
0
EEAR2
R/W
R/W
X
2
2
0
EEAR1
R/W
R/W
X
1
1
0
EEAR0
R/W
LSB
R/W
1187H–AVR–09/07
X
0
0
0
EEAR
EEDR