SAK-TC1767-256F133HL AD Infineon Technologies, SAK-TC1767-256F133HL AD Datasheet - Page 86

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SAK-TC1767-256F133HL AD

Manufacturer Part Number
SAK-TC1767-256F133HL AD
Description
IC MCU 32BIT FLASH 176-LQFP
Manufacturer
Infineon Technologies
Series
TC17xxr
Datasheet

Specifications of SAK-TC1767-256F133HL AD

Core Processor
TriCore
Core Size
32-Bit
Speed
133MHz
Connectivity
ASC, CAN, MLI, MSC, SSC
Peripherals
DMA, POR, WDT
Number Of I /o
88
Program Memory Size
2MB (2M x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.42 V ~ 1.58 V
Data Converters
A/D 4x10b, 32x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
176-LFQFP
Data Bus Width
32 bit
Data Ram Size
92 KB
Interface Type
SPI
Maximum Clock Frequency
133 MHz
Number Of Programmable I/os
88
Number Of Timers
2
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (12 bit, 16 Channel)
Packages
PG-LQFP-176
Max Clock Frequency
133.0 MHz
Sram (incl. Cache)
128.0 KByte
Can Nodes
2
A / D Input Lines (incl. Fadc)
36
Program Memory
2.0 MB
For Use With
B158-H8539-G2-X-7600IN - KIT STARTER TC176X SERIES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
SP000458056
Table 9
Parameter
Absolute sum of short
circuit currents of a pin
group (see
Inactive device pin
current
Absolute sum of short
circuit currents of the
device
External load
capacitance
1) Digital supply voltages applied to the TC1767 must be static regulated voltages which allow a typical voltage
2) Voltage overshoot up to 1.7 V is permissible at Power-Up and PORST low, provided the pulse duration is less
3) Voltage overshoot up to 4 V is permissible at Power-Up and PORST low, provided the pulse duration is less
4) See additional document “TC1767 Pin Reliability in Overload“ for definition of overload current on digital pins.
5) The overload coupling factor (kA) defines the worst case relation of an overload condition (IOV) at one pin to
6) The PLL jitter characteristics add to this value according to the application settings. See the PLL jitter
7) Applicable for digital outputs.
Table 10
Group
1
2
3
4
Data Sheet
swing of ±5%.
than 100 µs and the cumulated summary of the pulses does not exceed 1 h.
than 100 µs and the cumulated summary of the pulses does not exceed 1 h.
the resulting leakage current (IleakTOT) into an adjacent pin: IleakTOT = ±kA × |IOV| + IOZ1.
Thus under overload conditions an additional error leakage voltage (VAEL) will be induced onto an adjacent
analog input pin due to the resistance of the analog input source (RAIN). That means VAEL = RAIN ×
|IleakTOT|.
The definition of adjacent pins is related to their order on the silicon.
The Injected leakage current always flows in the opposite direction from the causing overload current.
Therefore, the total leakage current must be calculated as an algebraic sum of the both component leakage
currents (the own leakage current IOZ1 and the optional injected leakage current).
parameters.
Pins
P5.[14:8]
P1.[14:12]; P2.[7:0]
P4.[3:0]
P1.[3:2]; P1.[11:8]
Table
Operating Condition Parameters
Pin Groups for Overload/Short-Circuit Current Sum Parameter
10)
Symbol
Σ|
I
Σ|
C
ID
L
I
I
SC_PG
SC_D
|
|
SR
SR -1
SR
SR
Min.
82
Values
Typ. Max.
20
1
100
Unit Note /
mA
mA
mA
pF
Electrical Parameters
Test Condition
See note
All power supply
voltages V
See note
Depending on pin
class. See DC
characteristics
V1.3, 2009-09
4)
TC1767
DDx
= 0

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