SAK-TC1767-256F133HL AD Infineon Technologies, SAK-TC1767-256F133HL AD Datasheet - Page 73

• Manufacturer Part Number: SAK-TC1767-256F133HL AD
• Description: IC MCU 32BIT FLASH 176-LQFP
• Manufacturer: Infineon Technologies
• Series: TC17xxr

Specifications of SAK-TC1767-256F133HL AD

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: ASC, CAN, MLI, MSC, SSC
• Peripherals: DMA, POR, WDT
• Number Of I /o: 88
• Program Memory Size: 2MB (2M x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.42 V ~ 1.58 V
• Data Converters: A/D 4x10b, 32x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 176-LFQFP
• Data Bus Width: 32 bit
• Data Ram Size: 92 KB
• Interface Type: SPI
• Maximum Clock Frequency: 133 MHz
• Number Of Programmable I/os: 88
• Number Of Timers: 2
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (12 bit, 16 Channel)
• Packages: PG-LQFP-176
• Max Clock Frequency: 133.0 MHz
• Sram (incl. Cache): 128.0 KByte
• Can Nodes: 2
• A / D Input Lines (incl. Fadc): 36
• Program Memory: 2.0 MB
• For Use With: B158-H8539-G2-X-7600IN - KIT STARTER TC176X SERIES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: SP000458056

Table 4
Pin
7
8
13
14
15
16
Data Sheet
Symbol
P5.6
IN46
IN31
OUT46
OUT14
Reserved
P5.7
IN47
OUT47
OUT15
Reserved
P5.8
RDATA0B
Reserved
Reserved
OUT89
P5.9
RVALID0B
Reserved
Reserved
OUT90
P5.10
RREADY0B
Reserved
OUT91
P5.11
RCLK0B
Reserved
Reserved
OUT92
Pin Definitions and Functions (PG-LQFP-176-5 Package
Ctrl.
I/O0
I
I
O1
O2
O3
I/O0
I
O1
O2
O3
I/O0
I
O1
O2
O3
I/O0
I
O1
O2
O3
I/O0
O1
O2
O3
I/O0
I
O1
O2
O3
Type Function
A1/
PU
A1/
PU
A2/
PU
A2/
PU
A2/
PU
A2/
PU
Port 5 General Purpose I/O Line 6
GPTA0 Input 46
LTCA2 Input 31
GPTA0 Output 46
LTCA2 Output 14
-
Port 5 General Purpose I/O Line 7
GPTA0 Input 47
GPTA0 Output 47
LTCA2 Output 15
-
Port 5 General Purpose I/O Line 8
MLI0 Receiver Data Input B
-
-
LTCA2 Output 89
Port 5 General Purpose I/O Line 9
MLI0 Receiver Data Valid Input B
-
-
LTCA2 Output 90
Port 5 General Purpose I/O Line 10
MLI0 Receiver Ready Input B
-
LTCA2 Output 91
Port 5 General Purpose I/O Line 11
MLI0 Receiver Clock Input B
-
-
LTCA2 Output 92
69
1)
V1.3, 2009-09
) (cont’d)
TC1767
Pinning