SAB-C161PI-LM 3V CA Infineon Technologies, SAB-C161PI-LM 3V CA Datasheet - Page 29

• Manufacturer Part Number: SAB-C161PI-LM 3V CA
• Description: IC MICROCONTROLLER 16BIT MQFP100
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAB-C161PI-LM 3V CA

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-SQFP
• Data Bus Width: 16 bit
• Data Ram Size: 3 KB
• Interface Type: ASC, I2C, SSC
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 76
• Number Of Timers: 5
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 4 Channel
• Packages: PG-MQFP-100
• Max Clock Frequency: 20.0 MHz
• Sram (incl. Cache): 3.0 KByte
• A / D Input Lines (incl. Fadc): 4
• Program Memory: 0.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: B161PILM3VCAXT; SABC161PILM3VCAXT; SP000014365

&3,
2
I
C Module
2
The integrated I
C Bus Module handles the transmission and reception of frames over
2
2
2
the two-line I
C bus in accordance with the I
C Bus specification. The on-chip I
C Module
can receive and transmit data using 7-bit or 10-bit addressing and it can operate in slave
mode, in master mode or in multi-master mode.
Several physical interfaces (port pins) can be established under software control. Data
can be transferred at speeds up to 400 Kbit/sec.
2
Two interrupt nodes dedicated to the I
C module allow efficient interrupt service and also
support operation via PEC transfers.
2
Note: The port pins associated with the I
C interfaces feature open drain drivers only, as
2
required by the I
C specification.
Watchdog Timer
The Watchdog Timer represents one of the fail-safe mechanisms which have been
implemented to prevent the controller from malfunctioning for longer periods of time.
The Watchdog Timer is always enabled after a reset of the chip, and can only be
disabled in the time interval until the EINIT (end of initialization) instruction has been
executed. Thus, the chip’s start-up procedure is always monitored. The software has to
be designed to service the Watchdog Timer before it overflows. If, due to hardware or
software related failures, the software fails to do so, the Watchdog Timer overflows and
generates an internal hardware reset and pulls the RSTOUT pin low in order to allow
external hardware components to be reset.
The Watchdog Timer is a 16-bit timer, clocked with the system clock divided either by 2
or by 128. The high byte of the Watchdog Timer register can be set to a prespecified
reload value (stored in WDTREL) in order to allow further variation of the monitored time
interval. Each time it is serviced by the application software, the high byte of the
Watchdog Timer is reloaded. Thus, time intervals between 20 µs and 336 ms can be
monitored (@ 25 MHz).
The default Watchdog Timer interval after reset is 5.24 ms (@ 25 MHz).
Data Sheet
27
1999-07