AT89C51ID2-SLRIM Atmel, AT89C51ID2-SLRIM Datasheet - Page 26
AT89C51ID2-SLRIM
Manufacturer Part Number
AT89C51ID2-SLRIM
Description
IC MCU FLASH 8051 64K 5V 44-PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet
1.AT89C51ID2-RLTUM.pdf
(157 pages)
Specifications of AT89C51ID2-SLRIM
Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Other names
AT89C51ID2SLRIMTR
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AT89C51ID2
Table 23. AUXR1 register
AUXR1- Auxiliary Register 1(0A2h)
Reset Value: XXXX XX0X0b
Not bit addressable
Note:
ASSEMBLY LANGUAGE
Number
; Block move using dual data pointers
; Modifies DPTR0, DPTR1, A and PSW
; note: DPS exits opposite of entry state
; unless an extra INC AUXR1 is added
;
00A2
;
0000 909000MOV DPTR,#SOURCE ; address of SOURCE
0003 05A2 INC AUXR1 ; switch data pointers
0005 90A000 MOV DPTR,#DEST ; address of DEST
0008
0008 05A2 INC AUXR1 ; switch data pointers
000A E0 MOVX A,@DPTR ; get a byte from SOURCE
000B A3 INC DPTR ; increment SOURCE address
000C 05A2 INC AUXR1 ; switch data pointers
000E F0 MOVX @DPTR,A ; write the byte to DEST
000F A3 INC DPTR ; increment DEST address
0010 70F6JNZ LOOP ; check for 0 terminator
0012 05A2 INC AUXR1 ; (optional) restore DPS
Bit
7
7
6
5
4
3
2
1
0
-
*Bit 2 stuck at 0; this allows to use INC AUXR1 to toggle DPS without changing GF3.
LOOP:
AUXR1 EQU 0A2H
Mnemonic Description
ENBOOT
GF3
DPS
Bit
6
0
-
-
-
-
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Enable Boot Flash
Cleared to disable boot ROM.
Set to map the boot ROM between F800h - 0FFFFh.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
This bit is a general purpose user flag. *
Always cleared.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Data Pointer Selection
Cleared to select DPTR0.
Set to select DPTR1.
ENBOOT
5
4
-
GF3
3
2
0
1
-
4289C–8051–11/05
DPS
0
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