AT89C51ID2-SLRIM Atmel, AT89C51ID2-SLRIM Datasheet - Page 111
AT89C51ID2-SLRIM
Manufacturer Part Number
AT89C51ID2-SLRIM
Description
IC MCU FLASH 8051 64K 5V 44-PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet
1.AT89C51ID2-RLTUM.pdf
(157 pages)
Specifications of AT89C51ID2-SLRIM
Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Other names
AT89C51ID2SLRIMTR
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EEPROM Data
Memory
Write Data
4289C–8051–11/05
The 2K bytes on-chip EEPROM memory block is located at addresses 0000h to 07FFh
of the XRAM/ERAM memory space and is selected by setting control bits in the EECON
register.
A read or write access to the EEPROM memory is done with a MOVX instruction.
Data is written by byte to the EEPROM memory block as for an external RAM memory.
The following procedure is used to write to the EEPROM memory:
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•
•
•
•
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Figure 43 represents the optimal write sequence to the on-chip EEPROM data memory.
Check EEBUSY flag
If the user application interrupts routines use XRAM memory space: Save and
disable interrupts.
Load DPTR with the address to write
Store A register with the data to be written
Set bit EEE of EECON register
Execute a MOVX @DPTR, A
Clear bit EEE of EECON register
Restore interrupts.
EEBUSY flag in EECON is then set by hardware to indicate that programming is in
progress and that the EEPROM segment is not available for reading or writing.
The end of programming is indicated by a hardware clear of the EEBUSY flag.
AT89C51ID2
111
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