UPD78F9222CS-CAC-A Renesas Electronics America, UPD78F9222CS-CAC-A Datasheet - Page 237

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UPD78F9222CS-CAC-A

Manufacturer Part Number
UPD78F9222CS-CAC-A
Description
MCU 8BIT 4KB FLASH 20PIN
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet

Specifications of UPD78F9222CS-CAC-A

Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
13.1.2 Registers used during standby
select register (OSTS).
Address: FFF4H After reset: Undefined R/W
Symbol
OSTS
The oscillation stabilization time after the standby mode is released is controlled by the oscillation stabilization time
Remark For the registers that start, stop, or select the clock, see CHAPTER 5 CLOCK GENERATORS.
(1) Oscillation stabilization time select register (OSTS)
This register is used to select oscillation stabilization time of the clock supplied from the oscillator when the
STOP mode is released. The wait time set by OSTS is valid only when the crystal/ceramic oscillation clock is
selected as the system clock and after the STOP mode is released. If the high-speed internal oscillation or
external clock input is selected as the system clock source, no wait time elapses.
The system clock oscillator and the oscillation stabilization time that elapses after power application or release
of reset are selected by the option byte. For details, refer to CHAPTER 17 OPTION BYTE.
OSTS is set by using the 8-bit memory manipulation instruction.
Cautions 1. To set and then release the STOP mode, set the oscillation stabilization time as follows.
Remarks 1. ( ): f
OSTS1
0
0
1
1
7
0
Figure 13-1. Format of Oscillation Stabilization Time Select Register (OSTS)
2. The wait time after the STOP mode is released does not include the time from the
3. The oscillation stabilization time that elapses on power application or after release of
2. Determine the oscillation stabilization time of the resonator by checking the characteristics of
the resonator to be used.
Expected oscillation stabilization time of resonator
by OSTS
release of the STOP mode to the start of clock oscillation (“a” in the figure below),
regardless of whether STOP mode was released by reset signal generation or interrupt
generation.
reset is selected by the option byte. For details, refer to CHAPTER 17 OPTION BYTE.
OSTS0
X
= 10 MHz
6
0
0
1
0
1
2
2
2
2
10
12
15
17
waveform
/f
/f
/f
/f
of X1 pin
X
X
X
X
Voltage
CHAPTER 13 STANDBY FUNCTION
(102.4 s)
(409.6 s)
(3.27 ms)
(13.1 ms)
5
0
STOP mode is released
User’s Manual U16898EJ6V0UD
4
0
a
Selection of oscillation stabilization time
3
0
Oscillation stabilization time set
2
0
OSTS1
1
OSTS0
0
235

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