UPD78F9222CS-CAC-A Renesas Electronics America, UPD78F9222CS-CAC-A Datasheet - Page 201

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UPD78F9222CS-CAC-A

Manufacturer Part Number
UPD78F9222CS-CAC-A
Description
MCU 8BIT 4KB FLASH 20PIN
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet

Specifications of UPD78F9222CS-CAC-A

Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
11.4.2 Asynchronous serial interface (UART) mode
performed.
baud rates.
(1) Registers used
In this mode, data of 1 byte is transmitted/received following a start bit, and a full-duplex operation can be
A dedicated UART baud rate generator is incorporated, so that communication can be executed at a wide range of
The basic procedure of setting an operation in the UART mode is as follows.
<1> Set the CKSR6 register (see Figure 11-8).
<2> Set the BRGC6 register (see Figure 11-9).
<3> Set bits 0 to 4 (ISRM6, SL6, CL6, PS60, PS61) of the ASIM6 register (see Figure 11-5).
<4> Set bits 0 and 1 (TXDLV6, DIR6) of the ASICL6 register (see Figure 11-10).
<5> Set bit 7 (POWER6) of the ASIM6 register to 1.
<6> Set bit 6 (TXE6) of the ASIM6 register to 1.
<7> Write data to transmit buffer register 6 (TXB6).
Caution Take the relationship with the other party of communication into consideration for the port
Asynchronous serial interface reception error status register 6 (ASIS6)
Asynchronous serial interface operation mode register 6 (ASIM6)
Asynchronous serial interface transmission status register 6 (ASIF6)
Clock selection register 6 (CKSR6)
Baud rate generator control register 6 (BRGC6)
Asynchronous serial interface control register 6 (ASICL6)
Input switch control register (ISC)
Port mode register 4 (PM4)
Port register 4 (P4)
Set bit 5 (RXE6) of the ASIM6 register to 1.
mode register and port register setting procedures.
unintended start bits (falling signals), set PM43 to 0 (output) after having set P43 to 1.
CHAPTER 11 SERIAL INTERFACE UART6
User’s Manual U16898EJ6V0UD
Transmission is enabled.
Reception is enabled.
Data transmission is started.
In order to avoid the generation of
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