M30620FCAFP#D3 Renesas Electronics America, M30620FCAFP#D3 Datasheet - Page 439
M30620FCAFP#D3
Manufacturer Part Number
M30620FCAFP#D3
Description
IC M16C MCU FLASH 128K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Specifications of M30620FCAFP#D3
Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
85
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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A-D Converter
Figure 2.7.9. Operation timing of one-shot mode, with expanded analog input pin selected
Operation (1) Setting the A-D conversion start flag to “1” causes the A-D converter to start the conversion on
2.7.4 Operation of A-D Converter (in one-shot mode, expanded analog input pin selected)
A-D conversion
start flag
A-D register i
A-D conversion
interrupt request “0”
AD
In one-shot mode, choose functions from those listed in Table 2.7.4. Operations of the circled items
are described below. Figure 2.7.9 shows timing chart, and Figure 2.7.10 shows the set-up procedure.
Note: When
(2) After the A-D conversion of voltage input to the ANEXi pin is completed, the content of the
Table 2.7.4. Choosed functions
Conversion rate per analog input pin is 49
Resolution
Analog input pin
Trigger for starting
A-D conversion
Operation clock
AD
voltage input to the ANEXi pin.
successive comparison register (conversion result) is transmitted to the A-D register. At the
same time, the A-D conversion interrupt request bit goes to “1”. Also, the A-D conversion start
flag goes to “0”, and the A-D converter stops operating.
“1”
“0”
“1”
Item
AD
frequency is less than 1MH
(1) Start A-D conversion
O
O
O
O
Divided-by-4 f
by-2 f
8-bit / 10-bit
One of AN
Software trigger
Trigger by AD
8-bit resolution : 28
10-bit resolution : 33
Cleared to “0” when interrupt request is accepted, or cleared by software
Set to “1” by software
AD
/ f
Z
Set-up
AD
0
, sample and hold function cannot be selected.
pin to AN
AD
TRG
AD
/ divided-
cycles for 8-bit resolution and 59
7
pin
AD
AD
cycles
cycles
Sample & Hold
Expanded analog
input pin
(2) A-D convesion is complete
Item
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
AD
cycles for 10-bit resolution.
O
O
Not used
Either ANEX0 pin or
ANEX1 pin
External operation amplifier
connection mode
Not activated
Activated
Result
M16C / 62A Group
Mitsubishi microcomputers
Set-up
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