M30620FCAFP#D3 Renesas Electronics America, M30620FCAFP#D3 Datasheet - Page 32
M30620FCAFP#D3
Manufacturer Part Number
M30620FCAFP#D3
Description
IC M16C MCU FLASH 128K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Specifications of M30620FCAFP#D3
Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
85
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Memory
Operation of Functional Blocks
Memory
Figure 1.3.1. Memory map
The M16C/62A group accommodates certain units in a single chip. These units include ROM and RAM to
store instructions and data and the central processing unit (CPU) to execute arithmetic/logic operations.
Also included are peripheral units such as timers, serial I/O, D-A converter, DMAC, CRC calculation circuit,
A-D converter, and I/O ports.
The following explains each unit.
Figure 1.3.1 is a memory map of the M16C/62A group. The address space extends the 1M bytes from
address 00000
there is 128K bytes of internal ROM from E0000
the reset and NMI are mapped to FFFDC
stored here. The address of the vector table for timer interrupts, etc., can be set as desired using the
internal register (INTB). See the section on interrupts for details.
From 00400
to the space from 00400
calling subroutines and when interrupts are generated.
The SFR area is mapped to 00000
eral devices such as I/O ports, A-D converter, serial I/O, and timers, etc. Figures 1.6.1 to 1.6.3 are location
of peripheral unit control registers. Any part of the SFR area that is not occupied is reserved and cannot be
used for other purposes.
The special page vector table is mapped to FFE00
or the destination addresses of jumps are stored here, subroutine call instructions and jump instructions
can be used as 2-byte instructions, reducing the number of program steps.
In memory expansion mode and microprocessor mode, a part of the spaces are reserved and cannot be
used. For example, in the M30622MCA-XXXFP, the following spaces cannot be used.
• The space between 01800
• The space between D0000
ROM size
RAM size
3K bytes
4K bytes
5K bytes
10K bytes
20K bytes
32K bytes
64K bytes
96K bytes
128K bytes
256K bytes
16
_______
up is RAM. For example, in the M30622MCA-XXXFP, 5K bytes of internal RAM is mapped
16
Address XXXXX
Address YYYYY
to FFFFF
013FF
017FF
053FF
F8000
F0000
E8000
E0000
00FFF
02BFF
C0000
16
16
16
16
16
16
16
16
16
16
16
16
16
to 017FF
16
. From FFFFF
16
16
FFFFF
Note 1: During memory expansion and microprocessor modes, can not be used.
Note 2: In memory expansion mode, can not be used.
Note 3: These memory maps show an instance in which PM13 is set to 0; but in the
00000
XXXXX
04000
D0000
YYYYY
00400
and 03FFF
and DFFFF
16
16
16
16
16
16
16
16
16
to 003FF
case of products in which the internal RAM and the internal ROM are expanded
to over 15 Kbytes and 192 Kbytes, respectively, they show an instance in which
PM13 is set to 1.
. In addition to storing data, the RAM also stores the stack used when
For details, see Figures
Internal ROM area
Internal RAM area
Internal reserved
External area
Internal reserved
1.6.1 to 1.6.3
area (Note 1)
area (Note 2)
SFR area
16
16
16
16
to FFFFF
16
(Memory expansion and microprocessor modes)
(Memory expansion mode)
down is ROM. For example, in the M30622MCA-XXXFP,
16
. This area accommodates the control registers for periph-
to FFFFF
16
to FFFDB
16
. The starting address of the interrupt routine is
16
. The vector table for fixed interrupts such as
16
FFFFF
FFE00
FFFDC
. If the starting addresses of subroutines
16
16
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
16
Undefined instruction
Watchdog timer
BRK instruction
Special page
Address match
vector table
Single step
Overflow
Reset
DBC
NMI
M16C / 62A Group
Mitsubishi microcomputers
1-11
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