HD64F2166VTE33 Renesas Electronics America, HD64F2166VTE33 Datasheet - Page 14

• Manufacturer Part Number: HD64F2166VTE33
• Description: IC H8S MCU FLASH 512K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of HD64F2166VTE33

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 7 Data Transfer Controller (DTC)........................................................ 149
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
Rev. 3.00, 03/04, page xii of xl
Features............................................................................................................................. 149
Register Descriptions........................................................................................................ 151
7.2.1
7.2.2
7.2.3
7.2.4
7.2.5
7.2.6
7.2.7
7.2.8
7.2.9
7.2.10 Event Counter Control Register (ECCR)............................................................. 157
7.2.11 Event Counter Status Register (ECS) .................................................................. 158
DTC Event Counter .......................................................................................................... 159
7.3.1
7.3.2
Activation Sources............................................................................................................ 161
Location of Register Information and DTC Vector Table ................................................ 162
Operation .......................................................................................................................... 165
7.6.1
7.6.2
7.6.3
7.6.4
7.6.5
7.6.6
7.6.7
Procedures for Using DTC................................................................................................ 173
7.7.1
7.7.2
Examples of Use of the DTC ............................................................................................ 174
7.8.1
7.8.2
Usage Notes ...................................................................................................................... 176
7.9.1
7.9.2
7.9.3
7.9.4
7.9.5
DTC Mode Register A (MRA) ............................................................................ 152
DTC Mode Register B (MRB)............................................................................. 153
DTC Source Address Register (SAR).................................................................. 153
DTC Destination Address Register (DAR).......................................................... 153
DTC Transfer Count Register A (CRA) .............................................................. 154
DTC Transfer Count Register B (CRB)............................................................... 154
DTC Enable Registers (DTCER)......................................................................... 154
DTC Vector Register (DTVECR)........................................................................ 155
Keyboard Comparator Control Register (KBCOMP).......................................... 156
Event Counter Handling Priority ......................................................................... 160
Usage Notes ......................................................................................................... 161
Normal Mode....................................................................................................... 166
Repeat Mode........................................................................................................ 167
Block Transfer Mode ........................................................................................... 168
Chain Transfer ..................................................................................................... 169
Interrupt Sources.................................................................................................. 170
Operation Timing................................................................................................. 170
Number of DTC Execution States ....................................................................... 171
Activation by Interrupt......................................................................................... 173
Activation by Software ........................................................................................ 173
Normal Mode....................................................................................................... 174
Software Activation ............................................................................................. 174
Module Stop Mode Setting .................................................................................. 176
On-Chip RAM ..................................................................................................... 176
DTCE Bit Setting................................................................................................. 176
Setting Required on Entering Subactive Mode or Watch Mode.......................... 176
DTC Activation by Interrupt Sources of SCI, IIC, or A/D Converter ................. 176