HD6473258P10V Renesas Electronics America, HD6473258P10V Datasheet - Page 153

MCU 5V 32K PB-FREE 64-DIP

HD6473258P10V

Manufacturer Part Number
HD6473258P10V
Description
MCU 5V 32K PB-FREE 64-DIP
Manufacturer
Renesas Electronics America
Series
H8® H8/325r
Datasheets

Specifications of HD6473258P10V

Core Size
8-Bit
Program Memory Size
32KB (32K x 8)
Oscillator Type
External
Core Processor
H8/300
Speed
10MHz
Connectivity
SCI, UART/USART
Number Of I /o
53
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Operating Temperature
-20°C ~ 75°C
Package / Case
64-DIP
No. Of I/o's
53
Ram Memory Size
1024Byte
Cpu Speed
10MHz
No. Of Timers
3
Digital Ic Case Style
DIP
Supply Voltage
RoHS Compliant
Controller Family/series
H8/330
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Peripherals
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6473258P10V
Manufacturer:
RENESAS
Quantity:
600
Part Number:
HD6473258P10V
Manufacturer:
RENESAS
Quantity:
1 200
Part Number:
HD6473258P10V
Manufacturer:
HITACHI/日立
Quantity:
20 000
7.8 Application Notes
Application programmers should note that the following types of contention can occur in the free-
running timer.
(1) Contention between FRC Write and Clear: If an internal counter clear signal is generated
during the T
takes priority and the write is not performed.
Figure 7-17 shows this type of contention.
(2) Contention between FRC Write and Increment: If an FRC increment pulse is generated
during the T
priority and the FRC is not incremented.
Figure 7-18 shows this type of contention.
3
3
state of a write cycle to the lower byte of the free-running counter, the clear signal
state of a write cycle to the lower byte of the free-running counter, the write takes
Ø
Internal address bus
Internal write signal
FRC clear signal
FRC
Figure 7-17. FRC Write-Clear Contention
T
FRC lower byte write cycle
1
N
145
FRC address
T
2
T
3
H'0000
Fig 7-17

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