MC68HC711E9MFNE2 Freescale Semiconductor, MC68HC711E9MFNE2 Datasheet - Page 191

IC MCU 8BIT 512BYTES ROM 52-PLCC

MC68HC711E9MFNE2

Manufacturer Part Number
MC68HC711E9MFNE2
Description
IC MCU 8BIT 512BYTES ROM 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC711E9MFNE2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
12KB (12K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
52-PLCC
Processor Series
HC711E
Core
HC11
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
2 MHz
Number Of Programmable I/os
38
Number Of Timers
8
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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9.5.3 Output Compare Mask Register
M68HC11E Family — Rev. 3.2
MOTOROLA
Address:
Use OC1M with OC1 to specify the bits of port A that are affected by a
successful OC1 compare. The bits of the OC1M register correspond to
PA[7:3].
OC1M[7:3] — Output Compare Masks
Bits [2:0] — Unimplemented
Reset:
Read:
Write:
Always read 0
0 = OC1 disabled
1 = OC1 enabled to control the corresponding pin of port A
Figure 9-13. Output Compare 1 Mask Register (OC1M)
OC1M7
$100C
Bit 7
0
= Unimplemented
OC1M6
Timing System
6
0
OC1M5
5
0
OC1M4
4
0
OC1M3
3
0
2
0
Output Compare
1
0
Timing System
Technical Data
Bit 0
0
191

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