M30800SFP-BL#U5 Renesas Electronics America, M30800SFP-BL#U5 Datasheet - Page 291

MCU 3/5V 0K,PB-FREE 100-QFP

M30800SFP-BL#U5

Manufacturer Part Number
M30800SFP-BL#U5
Description
MCU 3/5V 0K,PB-FREE 100-QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/80r
Datasheet

Specifications of M30800SFP-BL#U5

Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
45
Program Memory Type
ROMless
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M30800SFP-BL#U5M30800SFP-BL#D5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
M30800SFP-BL#U5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
M
R
R
e
E
1
v
J
6
Figure 30.3 Shifting to the low speed mode flowchart
1 .
0
C
9
0 .
8 /
B
0
Note 1: For flash memory power supply-OFF bit to be set to “1”, the user needs to write a “0” and then a “1” to it in
Note 2: Before the count source for BCLK can be changed from X
0
0
(Subsequent operations are executed by control
1
A
8
G
Transfer the program to be executed in the
Jump to transferred control program in RAM
u
7
o r
. g
low speed mode, to the internal RAM.
0 -
u
1
0
succession. When it is not this procedure, it is not enacted in “1”. This is necessary to ensure that no
interrupt or DMA transfer will be executed during the interval.
the count source is going to be switched must be oscillating stably.
p
0
, 2
0
2
0
program in this RAM)
0
Program in ROM
5
Page 278
Start
*1
f o
3
2
9
Set flash memory power supply-OFF bit to “1”
(by writing “0” and then “1” in succession)(Note 1)
X
IN
Set flash memory power supply-OFF bit to “0”
Wait time until the internal circuit stabilizes
(Set NOP instruction about twice)
Switch the count source of BCLK.
X
IN
oscillating
Switch the count source of BCLK (Note 2)
IN
to X
stop. (Note 2)
CIN
Process of low speed mode
or vice versa, the clock to which
Program in RAM
Wait until the X
End
*1
30. CPU Rewrite Mode
IN
has stabilized

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