M30800SFP-BL#U5 Renesas Electronics America, M30800SFP-BL#U5 Datasheet - Page 234

• Manufacturer Part Number: M30800SFP-BL#U5
• Description: MCU 3/5V 0K,PB-FREE 100-QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/80r

Specifications of M30800SFP-BL#U5

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 45
• Program Memory Type: ROMless
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

M
R
R
e
E
1
v
J
6
1 .
0
C
Reducing power consumption
DRAM controller
9
0 .
8 /
(1) When A/D conversion is not performed, select the Vref not connected with the Vref connect bit of A/D
(2) When using AN4 (P10
(3) When ANEX0 and ANEX1 are used, select the input peripheral function disable with port P9
(4) When D/A converter is not used, set output disabled with the D/A output enable bit of D/A control
(5) When D/A conversion is used, select the input peripheral function disabled with port P9
When shifting to self-refresh, select DRAM ignored by the DRAM space select bit. In the next instruction,
simultaneously set the DRAM space select bit and self-refresh ON by self-refresh mode bit. Also, insert
two NOPs after the instruction that sets the self-refresh mode bit to "1".
Do not access external memory while operating in self-refresh. (All external memory space access is
inhibited. )
When disabling self-refresh, simultaneously select DRAM ignored by the DRAM space select bit and self-
refresh OFF by self-refresh mode bit. In the next instruction, set the DRAM space select bit.
Do not access the DRAM space immediately after setting the DRAM space select bit.
Example) One wait is selected by the wait select bit and 4MB is selected by the DRAM space select bit
B
0
0
0
1
A
G
8
control register 1. When A/D conversion is performed, start the A/D conversion at least 1 s or longer
after connecting Vref.
the key input interrupt disable bit of the function select register C .
used. Also, the port cannot be input even if the direction register of P10
input result becomes undefined). When the input disable of the key input interrupt signal is selected,
use all AN4 to AN7 as A/D inputs.
input peripheral function select bit of the function select register B3.
tion register is set to input (the input result becomes undefined).
register and set the D/A register to "00
peripheral function select bit of the function select register B3.
direction register is set to input (the input result becomes undefined).
When selecting the input disable of the key input interrupt signal, the key input interrupt cannot be
When the input peripheral function disable is selected, the port cannot be input even if the port direc-
Also, it is not possible to input a peripheral function except ANEX0 and ANEX1.
When the input peripheral function disabled is selected, the port cannot be input even if the port
Also, it is not possible to input a peripheral function.
u
7
o r
. g
0 -
Shifting to self-refresh
Disable self-refresh
u
1
0
p
0
, 2
0
2
0
•••
mov.b
mov.b
nop
nop
•••
•••
mov.b
mov.b
nop
nop
•••
0
5
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#00000001b,DRAMCONT
#10001011b,DRAMCONT
#00000001b,DRAMCONT
#00001011b,DRAMCONT
4
) to AN7 (P10
f o
3
2
9
7
), select the input disable of the key input interrupt signal with
16
".
;DRAM ignored, one wait is selected
;Set self-refresh, select 4MB and one wait
;Two nops are needed
;
;Disable self-refresh, DRAM ignored, one wait is
;selected
;Select 4MB and one wait
;Inhibit instruction to access DRAM area
4
to P10
27. Usage Precaution
7
is set to input (the
3
and P9
5
and P9
4
input
6