HD64F2338VFC25 Renesas Electronics America, HD64F2338VFC25 Datasheet - Page 202

• Manufacturer Part Number: HD64F2338VFC25
• Description: MCU 3V 256K 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of HD64F2338VFC25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

6.5.6
Figure 6.15 shows the basic access timing for DRAM space. The basic DRAM access timing is
four states. Unlike the basic bus interface, the corresponding bits in ASTCR control only enabling
or disabling of wait insertion, and do not affect the number of access states. When the
corresponding bit in ASTCR is cleared to 0, wait states cannot be inserted in the DRAM access
cycle.
The four states of the basic timing consist of one T
output cycle) state, and the T
Rev.4.00 Sep. 07, 2007 Page 170 of 1210
REJ09B0245-0400
Read
Write
Note: n = 2 to 5
Basic Timing
A
CS
CAS, LCAS
HWR (WE)
D
HWR (WE)
D
φ
23
15
15
n
to A
to D
to D
(RAS)
0
0
0
c1
and T
Figure 6.15 Basic Access Timing
T
c2
p
(column address output cycle) states.
Row
p
T
(precharge cycle) state, one T
r
T
c1
Column
T
c2
r
(row address