MCF5216CVF66J Freescale Semiconductor, MCF5216CVF66J Datasheet - Page 489
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MCF5216CVF66J
Manufacturer Part Number
MCF5216CVF66J
Description
IC MCU 512K FLASH 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF521xr
Datasheet
1.MCF5216CVM66J.pdf
(766 pages)
Specifications of MCF5216CVF66J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
142
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Processor Series
MCF521x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
M52210DEMO, M52211EVB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5216CVF66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Freescale Semiconductor
Bits
3–0
9
8
7
6
5
4
STOPACK
SOFTRST
FRZACK
SELF-
WAKE
Name
SUPV
APS
—
Soft reset. When this bit is asserted, the FlexCAN resets its internal state machines (sequencer,
error counters, error flags, and timer) and the host interface registers (CANMCR, CANICR,
CANTCR, IMASK, and IFLAG).
The configuration registers that control the interface with the CAN bus are not changed (CAN-
CTRL[0:2] and PRESDIV). Message buffers and receive message masks are also not changed.
This allows SOFTRST to be used as a debug feature while the system is running.
Setting SOFTRST also clears the STOP bit in CANMCR.
After setting SOFTRST, allow one complete bus cycle to elapse for the internal FlexCAN circuitry
to completely reset before executing another access to CANMCR.
The FlexCAN clears this bit once the internal reset cycle is completed.
0 Soft reset cycle completed
1 Soft reset cycle initiated
FlexCAN disable. When the FlexCAN enters debug mode, it sets the FRZACK bit. This bit should
be polled to determine if the FlexCAN has entered debug mode. When debug mode is exited, this
bit is negated once the FlexCAN prescaler is enabled. This is a read-only bit.
0 The FlexCAN has exited debug mode and the prescaler is enabled.
1 The FlexCAN has entered debug mode, and the prescaler is disabled.
Supervisor/user data space. The SUPV bit places the FlexCAN registers in either supervisor or
user data space.
0 Registers with access controlled by the SUPV bit are accessible in either user or supervisor
1 Registers with access controlled by the SUPV bit are restricted to supervisor mode.
Self wake enable. This bit allows the FlexCAN to wake up when bus activity is detected after the
STOP bit is set. If this bit is set when the FlexCAN enters low-power stop mode, the FlexCAN will
monitor the bus for a recessive to dominant transition. If a recessive to dominant transition is
detected, the FlexCAN immediately clears the STOP bit and restarts its clocks.
If a write to CANMCR with SELFWAKE set occurs at the same time a recessive-to-dominant edge
appears on the CAN bus, the bit will not be set, and the module clocks will not stop. The user
should verify that this bit has been set by reading CANMCR. Refer to
“Low-Power Stop Mode for Power
low-power stop mode.
0 Self wake disabled.
1 Self wake enabled.
Auto-power save. The APS bit allows the FlexCAN to automatically shut off its clocks to save
power when it has no process to execute, and to automatically restart these clocks when it has a
task to execute without any CPU intervention.
0 Auto-power save mode disabled; clocks run normally.
1 Auto-power save mode enabled; clocks stop and restart as needed.
clocks, it sets the STOPACK bit. This bit should be polled to determine if the FlexCAN has entered
low-power stop mode. When the FlexCAN exits low-power stop mode, the STOPACK bit is
cleared once the FlexCAN’s clocks are running.
0 The FlexCAN is not in low-power stop mode and its clocks are running.
1 The FlexCAN has entered low-power stop mode and its clocks are stopped
Reserved, should be cleared.
Stop acknowledge. When the FlexCAN is placed in low-power stop mode and shuts down its
privilege mode.
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Table 25-8. CANMCR Field Descriptions (continued)
Saving” for more information on entry into and exit from
Description
Section 25.4.11.2,
FlexCAN
25-19
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