MC68HC11K1CFUE3 Freescale Semiconductor, MC68HC11K1CFUE3 Datasheet - Page 233

• Manufacturer Part Number: MC68HC11K1CFUE3
• Description: MCU 8-BIT 768 RAM 3MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC11K1CFUE3

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Type: ROMless
• Eeprom Size: 640 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

M68HC11K Family
MOTOROLA
The base address for each window must be an integer multiple of the
window size, with one exception. When the window size is 32 Kbytes,
the base address can be at $4000 as well as the 32-Kbyte multiples
$0000 and $8000.
This special case requires a modification in address line deployment.
Normally, when the bank size is 32 Kbytes and the bank address is
$0000 or $8000, CPU address lines ADDR[14:0] select individual bytes
within the 32-Kbyte space and the ADDR[14:0] pins are connected to
address lines A[14:0] of the memory device. When the base address is
$4000, the CPU address signal ADDR14 must be inverted to allow
32 Kbytes of contiguous memory. To do this, the CPU drives the
inverted ADDR14 signal onto the XA14 pin when the window is active,
and the non-inverted CPU ADDR14 signal onto the XA14 pin when the
window is not active. Therefore, address 14 of the memory device must
be connected to expansion line XA14 rather than normal address line
ADDR14.
If the two memory windows overlap, window 1 has priority, and only the
portion of window 2 that does not overlap window 1 remains active. If a
of Banks
Freescale Semiconductor, Inc.
Number
Table 11-1. CPU Address and Address Expansion Signals
For More Information On This Product,
16
32
64
2
4
8
Memory Expansion and Chip Selects
Go to: www.freescale.com
ADDR[12:0]
ADDR[12:0]
ADDR[12:0]
ADDR[12:0]
ADDR[12:0]
ADDR[12:0]
XA[14:13]
XA[15:13]
XA[16:13]
XA[17:13]
XA[18:13]
8 Kbytes
XA13
ADDR[13:0]
ADDR[13:0]
ADDR[13:0]
ADDR[13:0]
ADDR[13:0]
16 Kbytes
XA[15:14]
XA[16:14]
XA[17:14]
XA[18:14]
XA14
—
—
Window Size
Memory Expansion and Chip Selects
ADDR[14:0]
ADDR[14:0]
ADDR[14:0]
ADDR[14:0]
32 Kbytes
XA[16:15]
XA[17:15]
XA[18:15]
XA15
—
—
—
—
(Window Based
Memory Expansion
ADDR[13:0]
ADDR[13:0]
ADDR[13:0]
ADDR[13:0]
32 Kbytes
XA[15:14]
XA[16:14]
XA[17:14]
XA[18:14]
at $4000)
Technical Data
—
—
—
—
233